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Cortex-M4: guaranteed wakeup from WFI?

Note: This was originally posted on 8th August 2013 at http://forums.arm.com

Hi all!

I'm wondering how to ensure that the Cortex-M4 is always woken up on an interrupt from the WFI instruction when executing code like this:

__disable_irq();
// do something ...
__enable_irq();
__WFI();

If an interrupt is triggered between __enable_irq() and __WFI(), the interrupt handler is processed [font="Arial"]immediately and completed before [/font][font="Courier New"]__WFI() is executed, i.e., [/font][font="Arial"][font="Courier New"]__WFI()[/font] will wait for the next interrupt such that the first one is effectively lost. The ATmega* processors have a very simple solution to this problem: enabling interrupts is always delayed by one clock cycle such that the processor can safely enter sleep mode before interrupts can occur and wake up the processor. Thereby it is guaranteed that the processor is always woken up on an interrupt. How is this done on the Cortex-M4? As far as I know, there is no such enable interrupt delay, or is there a totally different mechanism to ensure wakeup on interrupts?

Thanks & kind regards,
Markus


P.S.: A lengthy discussion on a similar topic is here, though in German language.
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  • Note: This was originally posted on 9th August 2013 at http://forums.arm.com


    __WFI();
    __enable_irq();
    __ISB();
    __disable_irq();

    Should be sufficient.

    Looks reasonable. The manual says "Exception entry occurs when there is a pending exception with sufficient priority and either the processor is in Thread mode...", so I guess there is no risk of interrupt "starvation" when enabling interrupts only for a very short period of time (like in the example above).

    Kind regards,
    Markus
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  • Note: This was originally posted on 9th August 2013 at http://forums.arm.com


    __WFI();
    __enable_irq();
    __ISB();
    __disable_irq();

    Should be sufficient.

    Looks reasonable. The manual says "Exception entry occurs when there is a pending exception with sufficient priority and either the processor is in Thread mode...", so I guess there is no risk of interrupt "starvation" when enabling interrupts only for a very short period of time (like in the example above).

    Kind regards,
    Markus
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