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Attempt to set Secure Privileged Mode in armv7 A8 (using am3358 BBB silicon)?

Hello to the ARM experts,

I am relatively new to ARM hardware. Usually I use off the shelf systems (various Linux distros) to set up the BBB, as referent design.

Recently, I have started to dive more deep into the armv7 A8 programming model. And I found confusing areas (I have concrete questions to ask).

Namely, I would like to read the Secure Configuration Register:

http://infocenter.arm.com/help/topic/com.arm.doc.ddi0344k/DDI0344K_cortex_a8_r3p2_trm.pdf#page=133

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To access the Secure Configuration Register, read or write CP15 with:
MRC p15, 0, <Rd>, c1, c1, 0 ; Read Secure Configuration Register data
MCR p15, 0, <Rd>, c1, c1, 0 ; Write Secure Configuration Register data
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For this purpose, I wrote iny driver, which is presented here:

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/*
* cp15_spm.c - how to read in Secure Privileged Mode (SPM) Secure Configuration Register data
*/
#include <linux/module.h> /* Needed by all modules */
#include <linux/kernel.h> /* Needed for KERN_INFO */
#include <linux/init.h> /* Needed for the macros */
MODULE_LICENSE("GPL"); ///< The license type -- this affects available functionality
MODULE_DESCRIPTION("An armv7 A8 test driver"); ///< The description -- see modinfo
MODULE_VERSION("0.01"); ///< A version number to inform users
static inline unsigned asm_get_cpsr(void) {
unsigned long retval;
__asm ("mrs r0, cpsr");
__asm ("bic r0, r0, #0x1f");
__asm ("orr r0, r0, #0x16");
__asm ("msr cpsr_c, r0");
__asm ("mrs r0, cpsr" : "=r"(retval) );
return retval;
}
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While reading the first time CPSR register, I got the following value: 0x60000013 (b10011 Supervisor Mode) - I am root/superuser.

I tried to set CPSR mode (LSB 5 bits) to the b10110 Secure Monitor Mode, but it seems that with the above presented code I am NOT able to do that!

While executing the following code:

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asm volatile("mrc p15, 0, %0, c1, c1, 0" : "=r"(reg_value) );
printk(KERN_INFO "Secure Configuration Register data: 0x%08x\n", reg_value);
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I've got the following: Internal error: Oops - undefined instruction: 0 [#1] ARM

The full log from code execution is here:

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root@beaglebone:~/projects/LKM# insmod cp15_spm.ko
[22948.622390] cp15_Test init
[22948.625381] ------------------------------------------------
[22948.631303] CPSR/R0 value is: 0x60000013
[22948.635480] NEW CPSR/R0 value using asm_get_cpsr() is: 0xc0b1b014
[22948.641850] ------------------------------------------------
[22948.647822] Internal error: Oops - undefined instruction: 0 [#1] ARM
[22948.654463] Modules linked in: cp15_spm(O+) tilcdc backlight tda998x drm_kms_helper syscopyarea sysfillrect sysimgblt fb_sys_fops drm drm_panel_orientation_quirks cfbfillrect cfbimgblt cfbcopyarea fb font [last unloaded: cp15_spm]
[22948.675841] CPU: 0 PID: 11611 Comm: insmod Tainted: G O 5.0.15-jumpnow #1
[22948.684290] Hardware name: Generic AM33XX (Flattened Device Tree)
[22948.690670] PC is at read_SPM_registers+0x40/0x70 [cp15_spm]
[22948.696583] LR is at read_SPM_registers+0x40/0x70 [cp15_spm]
[22948.702492] pc : [<bf18f040>] lr : [<bf18f040>] psr: 60000013
[22948.709036] sp : de23ddb8 ip : 00000000 fp : c0b0b088
[22948.714491] r10: de088dd8 r9 : 00000000 r8 : 00000000
[22948.719947] r7 : c0b6c6a8 r6 : bf194000 r5 : c0b0b088 r4 : bf190054
[22948.726763] r3 : 52a37879 r2 : 52a37879 r1 : c0b1b014 r0 : 00000030
[22948.733581] Flags: nZCv IRQs on FIQs on Mode SVC_32 ISA ARM Segment none
[22948.741033] Control: 10c5387d Table: 9cb70019 DAC: 00000051
[22948.747039] Process insmod (pid: 11611, stack limit = 0x58c41661)
[22948.753401] Stack: (0xde23ddb8 to 0xde23e000)
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Could you, please, show me the code snippet which switches Supervisor Mode to Secure Monitor Mode (if at all possible)?

Thank you,

_nobody_

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