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TCM arbitration hazard: Considerations for Firmware

c0deface

According to the ARM spec (ARM DDI 0460D section 8.4.4):

TCM arbitration
Each TCM port receives requests from the LSU, PFU, and AXI slave. In most cases, the LSU
has the highest priority, followed by the PFU, with the AXI slave having lowest priority.
When a higher-priority device is accessing a TCM port, an access from a lower-priority device
must stall. When either the LSU or the AXI slave interface is performing a read-modify-write
operation on a TCM port, various internal data hazards exist for either the AXI-slave interface
or the LSU. In these cases, additional stall cycles are generated, beyond those normally
required for arbitration.
Is there something special that the firmware should do for such hazard ?