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A question aboout Monitor Vector Base Address Register(MVBAR)

Hello, experts:

My platform has a Cortex-A9 MPCore CPU, It supports the trustzone tech.

I tried to switch the non-secure world to secure world in Linux but It is hard to implement.

I have a question about the trustzone about Monitor Vector Base Address Register(MVBAR).

SMC(secure monitor call) exception can enter the secure world.

Monitor Vector Base Address Register(MVBAR) holds the exception base address for all exceptions that are taken to Monitor mode.

But MVBAR only accessible from Secure PL1 modes.

How can I access MVBAR initially in the secure world?

Anything to enter the secure world initially?

Thank you for reading my question.

Best wishes,

Parents
  • Hi ,

    Most probably your Cortex-A9 boots into your platform romcodes,

    which loads and execute the next software component (e.g. u-boot or even directly Linux kernel).

    You need to tell us a bit more about your platform I think.

    On some platforms, romcode will first switch to non-secure world before booting (for example TI OMAP).

    On some others, romcode will stay in secure world and boot, so that the next software component can decide what to do (for example NXP i.MX).

    Best regards,

    Vincent.

Reply
  • Hi ,

    Most probably your Cortex-A9 boots into your platform romcodes,

    which loads and execute the next software component (e.g. u-boot or even directly Linux kernel).

    You need to tell us a bit more about your platform I think.

    On some platforms, romcode will first switch to non-secure world before booting (for example TI OMAP).

    On some others, romcode will stay in secure world and boot, so that the next software component can decide what to do (for example NXP i.MX).

    Best regards,

    Vincent.

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