We are running a survey to help us improve the experience for all of our members. If you see the survey appear, please take the time to tell us about your experience if you can.
Hello, experts:
My platform has a Cortex-A9 MPCore CPU, It supports trustzone tech.
I tried to change NSACR.TL bit, but It needs to change in the secure state.
I checked NSACR value in non-secure state and NSACR value that I changed is changed aperiodically.
For example print value;
nsacr : 0x00000000nsacr : 0x00000000nsacr : 0x00000000
....nsacr : 0x00200000nsacr : 0x00200000nsacr : 0x00200000....
Is NSACR.TL changed correctly?
Why NSACR value changed aperiodcially?
Best wishes,
According the TRM, bit 21 is reserved, so I would not bother if one of these bits is set or not.
Thank you for your reply.
I have been using Sabre Lite(Cortex-A9) with Linux and I tried to control NSACR.TL bit.
I'm awfully sorry for the wrong information.
Print result is 0x00020000.
According to Cortex-A9 TRM, NSACR.TL(17 bits) determines if lockable TLB entries can be allocated in Non-secure state.
I have another question, is Linux booting in Secure state?
AFAIK runs Linux in normal world (non-secure). The bootloader (U-Boot or even the first stage boot-loader) will switch to non-secure.
If you want to change NSACR you have to run at least a secure monitor.But if you have software running in privileged mode, you can check the SCR.NS (MRC p15, 0, <Rt>, c1, c1, 0 ; Read SCR into Rt).