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Architectures and Processors forum Cortex A8 Instruction Cycle Timing

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Cortex A8 Instruction Cycle Timing

Offline barney vardanyan over 9 years ago

Note: This was originally posted on 17th March 2011 at http://forums.arm.com

Hi) sorry for bad English

I need to count latency for two instruction, and all I have is the arm cortex A 8 documantation(charter 16) !
but I have no idea how can do this work using that documantation(

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0 Offline Etienne SOBOLE over 9 years ago

Note: This was originally posted on 21st March 2011 at http://forums.arm.com

Multi cycle instruction lock both the pipeline.
You can only have dual issue on last cycle

You'll have more information here
http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0344k/Babhefaj.html
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0 Offline Etienne SOBOLE over 9 years ago

Note: This was originally posted on 21st March 2011 at http://forums.arm.com

Multi cycle instruction lock both the pipeline.
You can only have dual issue on last cycle

You'll have more information here
http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0344k/Babhefaj.html
Cancel
Up 0 Down

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