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Cortex A8 Instruction Cycle Timing

Note: This was originally posted on 17th March 2011 at http://forums.arm.com

Hi) sorry for bad English

I need to count latency for two instruction, and all I have is the arm cortex A 8 documantation(charter 16) !
but I have no idea how can do this work using that documantation(
Parents
  • Note: This was originally posted on 10th May 2011 at http://forums.arm.com


    Thank you very much. Your database will help me save a lot of time. If I find any mistake, I will inform you immediately.
    I hope your next version will be online soon.


    Thank's !!!

    Be carreful, There is no LDM and STM instruction rules.
    Those instruction were too numerous to be manually describe. Rules for these instructions are build on loading table.
    They are notified in the table by nbcycle = -1
Reply
  • Note: This was originally posted on 10th May 2011 at http://forums.arm.com


    Thank you very much. Your database will help me save a lot of time. If I find any mistake, I will inform you immediately.
    I hope your next version will be online soon.


    Thank's !!!

    Be carreful, There is no LDM and STM instruction rules.
    Those instruction were too numerous to be manually describe. Rules for these instructions are build on loading table.
    They are notified in the table by nbcycle = -1
Children
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