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Cortex A8 Instruction Cycle Timing

barney vardanyan
Note: This was originally posted on 17th March 2011 at http://forums.arm.com

Hi) sorry for bad English

I need to count latency for two instruction, and all I have is the arm cortex A 8 documantation(charter 16) !
but I have no idea how can do this work using that documantation(
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    Note: This was originally posted on 14th June 2011 at http://forums.arm.com

    Have a look at "cortex-a8-cycle.xls", there are some points that I can't understand clearly:

    1. What is different between "dstCond" column and "cc-dst1" column and "cc-dst2"?
    2. In status register access instruction, MRS with the same type "dst,psr" but there are 2 lines. One line says that MRS takes 8 cycles. Other line says that MRS takes only 1 cycles.Why does this difference happen?
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  • 0
    Note: This was originally posted on 14th June 2011 at http://forums.arm.com

    Have a look at "cortex-a8-cycle.xls", there are some points that I can't understand clearly:

    1. What is different between "dstCond" column and "cc-dst1" column and "cc-dst2"?
    2. In status register access instruction, MRS with the same type "dst,psr" but there are 2 lines. One line says that MRS takes 8 cycles. Other line says that MRS takes only 1 cycles.Why does this difference happen?
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