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Cortex A8 Instruction Cycle Timing

barney vardanyan
Note: This was originally posted on 17th March 2011 at http://forums.arm.com

Hi) sorry for bad English

I need to count latency for two instruction, and all I have is the arm cortex A 8 documantation(charter 16) !
but I have no idea how can do this work using that documantation(
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  • 0
    Note: This was originally posted on 10th May 2011 at http://forums.arm.com


    1 - The ARM check before starting an instruction that all the registers will be available when the instruction will need them.
    For example:
    you want to execute a MUL Rd, Rm, Rs
    Rm must be available at cycle #11 (#10 + 1 see MUL cycle table http://infocenter.ar...ch16s02s03.html)
    If at least 1 register is not avalable, then the ARM do not start the instruction and you have a stall cycle.

    To do this check, I intend to create a database as below:
    Instruction...... Cycle......Rd........Rm..........Rn
    Mul......................2...........E5.........E1...........E1
    ...
    When my tool read an instruction, it look up into this database to get the available cycle of each register. However, it seems to be a lot of work for me at the moment :((
    Do you have any other ideal?
    Can you share with me your ideal to implementation!
Reply
  • 0
    Note: This was originally posted on 10th May 2011 at http://forums.arm.com


    1 - The ARM check before starting an instruction that all the registers will be available when the instruction will need them.
    For example:
    you want to execute a MUL Rd, Rm, Rs
    Rm must be available at cycle #11 (#10 + 1 see MUL cycle table http://infocenter.ar...ch16s02s03.html)
    If at least 1 register is not avalable, then the ARM do not start the instruction and you have a stall cycle.

    To do this check, I intend to create a database as below:
    Instruction...... Cycle......Rd........Rm..........Rn
    Mul......................2...........E5.........E1...........E1
    ...
    When my tool read an instruction, it look up into this database to get the available cycle of each register. However, it seems to be a lot of work for me at the moment :((
    Do you have any other ideal?
    Can you share with me your ideal to implementation!
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