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Cortex A8 Instruction Cycle Timing

Note: This was originally posted on 17th March 2011 at http://forums.arm.com

Hi) sorry for bad English

I need to count latency for two instruction, and all I have is the arm cortex A 8 documantation(charter 16) !
but I have no idea how can do this work using that documantation(

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0 barney vardanyan over 12 years ago

Note: This was originally posted on 18th March 2011 at http://forums.arm.com

Thanks a loooot for explanation)

but I still have one quation, what you mean when you say cycle

I don't understand, for example, the mul instruction takes 2 cycle, how its can block the rd during 6 cycle?
you want to say that in this case

mul r5, r1, r2
mov r3 ,r5

mov will wait 6 cycle for r5??
and this two instruction toghether wiil take 7 cycles??
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0 barney vardanyan over 12 years ago

Note: This was originally posted on 18th March 2011 at http://forums.arm.com

Thanks a loooot for explanation)

but I still have one quation, what you mean when you say cycle

I don't understand, for example, the mul instruction takes 2 cycle, how its can block the rd during 6 cycle?
you want to say that in this case

mul r5, r1, r2
mov r3 ,r5

mov will wait 6 cycle for r5??
and this two instruction toghether wiil take 7 cycles??
Cancel
Vote up 0 Vote down

Cancel

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