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Cortex A8 Instruction Cycle Timing

barney vardanyan
Note: This was originally posted on 17th March 2011 at http://forums.arm.com

Hi) sorry for bad English

I need to count latency for two instruction, and all I have is the arm cortex A 8 documantation(charter 16) !
but I have no idea how can do this work using that documantation(
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    Note: This was originally posted on 12th April 2011 at http://forums.arm.com

    I try your test, so every time that I add nop, the time incresed => two nop instructions can't executed in pair.
    I analyze with gdb , gcc  generates the wrong opcode for nop, it is mov r0,r0, so here appear dependancy for two nops.

    But in armv7 nop has it's own opcode which is 0xE320F000, so I edit the binary file, and replace opcode that generate gcc with this opcode, and two nops executed in parralel.

    So in your site two nops go in parralel, but gcc doesn't think so)))))))))))))))

    what you think about this?
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  • 0
    Note: This was originally posted on 12th April 2011 at http://forums.arm.com

    I try your test, so every time that I add nop, the time incresed => two nop instructions can't executed in pair.
    I analyze with gdb , gcc  generates the wrong opcode for nop, it is mov r0,r0, so here appear dependancy for two nops.

    But in armv7 nop has it's own opcode which is 0xE320F000, so I edit the binary file, and replace opcode that generate gcc with this opcode, and two nops executed in parralel.

    So in your site two nops go in parralel, but gcc doesn't think so)))))))))))))))

    what you think about this?
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