My Thumb 16-bit Instruction Set 'Quick Reference Guide' is permanently displayed on one of my monitors. I note several instructions that are at once listed but are marked as T2 i.e.(If then) IT {pattern} {cond}(compare/branch) CBZ Rn,<label>(!compare/branch) CBNZ Rn,<label> I think I am correct in saying that they are 16-bit instructions and that a few Thumb instructions are 32-bit i.e. BL, BLX. I am left wondering why the above, quite powerful instructions are listed in a guide entitled 'Thumb 16-bit Instruction Set - Quick Reference Card' but then have the T2 legend in the 'architecture version' field. There is a significant part of the Huffman decoding that would benefit hugely for conditional execution. Can someone confirm which processors support these instructions? I am doing my best to keep my project fast enough to execute on an M0/M0+/M1 processor (at 48MHz) to keep the unit price of the hardware down.Many thanks
Cortex-M3 and up does have it (Armv7-M). Cortex-M0 is Armv6-M.
Dang - the funny thing is that the MP3 decoder has no cause to use such functionality but I've noticed that all of the fixed-point (16 kbps) ACELP decoders that have fragments of Thumb 2 use it all over the place. I've worked out a pretty good solution. When it's done, I fully expect you to do better, Bastian. I really appreciate all of the help you have given me.