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What is meant by a Master in the AHB-Lite specification?

Kedhar Guhan

Hi

I am a rookie part of a group working on building a Microcontroller, for which we've decided to use AHB Lite protocol with one single master for interconnection. I have thoroughly examined the protocol and am well versed in its behaviour. 

But by saying master, do we refer to the actual processor or the interface within the AHB-Lite chip for the master? 

In an SOC, is there a separate chip for AHB interconnection between processor and memories? What does this chip comprise of? 

The architecture block diagram of an AHB-Lite system given in the specification manual refers to the entire SOC or the architecture inside the AHB-Chip? In the former case, master would be the processor, whereas in the latter case master would be just the  interface withing the AHB-Lite chip that makes the processor compatible with the protocol.

I'm confused with this fundamental idea of AMBA master-slave architecture. Please shed some clarity.

Thanks in Advance

B Kedhar Guhan