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Hi all,
According with ARMv6-M architecture reference manual, it supports two operation modes, handler mode and thread mode.
- "execution in handler mode is always privileged."
- "execution in thread mode can be privileged or unprivileged, depending on the value of CONTROL.nPRIV."
My question is where does the CONTROL.nPRIV comes from? This is a static RTL hardware config? or we just can switch it dynamically via software?
Thanks
Hi Jorge,
CONTROL is a special purpose register that controls the mode(user/privileged) and stack(psp/msp). If the privileged mode extension is implemented, we can change it by software. Otherwise, it is no use. You can read or write it by instruction MRS or MSR.
This section is described in architecture reference manual B1.4.4.
Best regards,
Wenchuan
If doing programming with microcontroller software packages (based on CMSIS-CORE header files), a number of C inrinsic functions like __set_CONTROL and __get_CONTROL are available.
https://www.keil.com/pack/doc/cmsis/Core/html/group__Core__Register__gr.html
Please also note that privilege level support in Cortex-M0+ is optional, so a chip with Cortex-M0+ might not have have CONTROL.nPRIV (in that case the bit would be tied to 0).