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Hi,
I am triggering PPI or SGI interrupt on gic500 which will then communicate with CA53 over cpu interface and interrupt routine will be executed.
After interrupt routine is executed, we can write to cpu interface End Of Interrupt Register to "clear" interrupt. But I want to bypass this part (not to write to End Of Interrupt Register) and clear interrupt by accessing GIC500 registers directly over his axi interface.
I've tried to clear active registers in gic500... but without success, looks like interrupt is not cleared. And I couldn't find how to do that in documentation.
Does anyone know procedure here?
Thanks a Lot
If you cleared the active state directly, you still have a problem with the core's running priority.On acknowledging the interrupt (IAR read), the core inherited the interrupt's priority, The core's running priority returns to the old value on the write EOIR.