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Behavior for other data on a STR (ARMv7-A)

superdesk

When the following line is executed, what is the behavior with respect to the other words in the cache line?

STR r1, [r0]

The 4 bytes of data in r1 is written to the address in r0. But cache-lines are 32 bytes long. Assuming write-through (and ignoring store-buffers), are all 32 bytes written to backing memory?

I think that this is how the cache behaves, and this question seems to confirm it: https://community.arm.com/processors/f/discussions/1318/memory-acces-and-cache/4282#4282

I haven't found anything explicit in the ARM ARM about this, so a pointer to the right page there would also really be appreciated!

Thanks,

James

  • +1

    I think CWG in CTR (B4.1.42   CTR, Cache Type Register, VMSA) is a good hint.

    CWG, bits[27:24]
    Cache Write-back Granule. The maximum size of memory that can be overwritten as a result of the
    eviction of a cache entry that has had a memory location in it modified, encoded as Log2 of the
    number of words.
    A value of 0b0000 indicates that the CTR does not provide Cache Write-back Granule information
    and either:
    • the architectural maximum of 512 words (2Kbytes) must be assumed
    • the Cache Write-back Granule can be determined from maximum cache line size encoded in
    the Cache Size ID Registers.
    Values greater than 0b1001 are reserved.

    (Wrong:On Cortex-A9 CWG (cache write back) is 3 (=> 2^3 = 8), so (edit:not the whole cacheline, but 8 words (edit: was bytes) are written back.

    Corrected: On Cortex-A9 CWG (cache write back) is 3 (=> 2^3 = 8), so the whole cacheline (8 words) are written back.

  • 0 in reply to 42Bastian Schick

    "encoded as Log2 of the number of words" <- For your example of 3, wouldn't that indicate 8 words, which would be the whole cacheline?

    Thanks, this is helpful. I guess my question now is: The CWG defines the maximum size of memory that is overwritten by a cache eviction; is that the same as the minimum size?