Why thumb code can only access r0-r7?

Registers R0 through R7 are the same across all CPU modes; they are never banked.

Addnl pointers in this link " en.wikipedia.org/.../ARM_architecture "

With over 100 billion ARM processors produced as of 2017, ARM is the most widely used instruction set architecture and the instruction set architecture produced in the largest quantity.

The Thumb version supports a variable-length instruction set that provides both 32- and 16-bit instructions for improved code density.

In Thumb, the 16-bit opcodes have less functionality. For example, only branches can be conditional, and many opcodes are restricted to accessing only half of all of the CPU's general-purpose registers

Registers R0 through R7 are the same across all CPU modes; they are never banked.

Addnl pointers in this link " en.wikipedia.org/.../ARM_architecture "

With over 100 billion ARM processors produced as of 2017, ARM is the most widely used instruction set architecture and the instruction set architecture produced in the largest quantity.

The Thumb version supports a variable-length instruction set that provides both 32- and 16-bit instructions for improved code density.

In Thumb, the 16-bit opcodes have less functionality. For example, only branches can be conditional, and many opcodes are restricted to accessing only half of all of the CPU's general-purpose registers

Thanks.

I only concern about Thumb-2. As Bastian said it supports full access. So...