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Raising priority of PendSV within NVIC when PendSV pending

Hi,

I'm trying to understand the behavior of raising (lowering numerical priority) the priority of PendSV in the NVIC of a Cortex M4 or M7 when PendSV is already pending. Below are the cases I'm grappling with,

1) High priority interrupt ISR is executing and does a PendSV (assume PendSV is lower logical priority than the high priority interrupt) in its execution path, then immediately raises the priority of PendSV in the NVIC to something logically higher than the currently running interrupt. Will PendSV fire immediately because it is higher priority and pending?

2) PendSV ISR is executing, and a higher priority interrupt fires. The processor moves to the ISR of the higher priority interrupt, and the active PendSV interrupt is moved to the pending state. The higher priority interrupt raises the priority of the PendSV interrupt to something higher than itself. Will PendSV fire immediately because it is higher priority and pending?

Thanks for any insight!

  • Hello, be carefull with configurable priorities of exceptions

    1) In the case of running SVC exception (SVC handler running on with priority level of 0x1) you make PendSV exception pending (PendSV is with priority level of 0x2) and then immediately change its priority to higher level (priority level of 0x0) than priority of currently running handler, the PendSV starts immediately.

    2) In the case of SVC exception (priority of 0x1) preempts running PendSV exception (priority of 0x2) and then immediately tries to change the priority of preempted PendSV (to the priority level of 0x0) to higher level than its own can cause hardfault exception. (from ARMv7-M Architecture Reference Manual) In particular, if a handler reduces the priority of its corresponding exception, the execution priority falls only to the priority of the highest-priority preempted exception. Therefore, reducing the priority of the current exception never permits:
    • A preempted exception to preempt the current exception handler.
    • Inversion of the priority of preempted exceptions.

    In your second case you try to change the priority of preempted exception in the exception of higher level that preempts it, I think that is logically the same as lowering the priority of higher priority level exception to levels lower than levels of preempted exceptions.

    Read the ARMv7-M Architecture Reference Manual, chapter B1.5.4 Exception priorities and preemption.