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Behaviour of HREADYOUTS of ahb_to_ahb_apb_async IP

tpvidigal

We are using this IP in our system to adapt two AHB with different clock domains. We would like additional info about the behaviour of it's HREADYOUTS signal. We are using it in the following scenario:

  • AHB1 <-> bridge <-> module
  • There are no burst operations (HTRANS = NON_SEQ or IDLE, HSIZE = BYTE, HALFWORD or WORD)
  • Module treat unexpected cases (HRESP = OKAY always)
  • Module always operate in 1 cycle (HREADYOUT = 1 always)
We noticed that the bridge always make HREADYOUT drop when a transmission starts. So the first cycle it will always be 0, right? How many cycles will it keep being 0 until it finishes the transmission (HREADYOUT goes to 1)?
In the case that multiple transmissions are occurring in sequence (all NON_SEQ), will it keep those same cycles of HREADYOUT = 0 for each transmission or just the first transmission will generate those zeros?
Also, the number of zero cycles will depend of some configuration? Transmission size (even thou the bigger is WORD)? If it's an IDLE transmission
Finally, we know that this behaviour is totally inside the AMBA specs. We just want to understand more the operation of the IP so we can make some additional tests. Thanks.
  • +1 Arm Employee Badge

    Hi there,

    >So the first cycle it will always be 0, right?

    Yes for Non-sequential and  Sequential transfers.

    >How many cycles will it keep being 0 until it finishes the transmission (HREADYOUT goes to 1)?

    It depends on the ratio between the two clocks.

    >In the case that multiple transmissions are occurring in sequence (all NON_SEQ),

    > will it keep those same cycles of HREADYOUT = 0 for each transmission or just the first transmission will generate those zeros?

    The wait state will generate for each of the transfers.

    >Also, the number of zero cycles will depend of some configuration? 

    It depends on clock ratio.

    >Transmission size (even thou the bigger is WORD)?

    The bridge only support up to 32-bit transfers. The transfer is ignored if:

    1) HTRANS is IDLE, or

    2) HSEL is 0

    In these cases, yes, you can have HSIZE >32 bit as it is not being handled by the bridge.

    regards,

    Joseph