Doing some research of the LDREX and STREX it appears that the exclusivity address range for these instructions on the M3,M4,M7 is the entire memory space. Hence you can only use the LDREX/STREX with one address. Does this not limit you to one Mutex (or at most 32 if you can bit map them?).
Thus it does not seem to be a very practical solution for an RTOS, or am I missing something?
Hi there,
In Cortex-M, exclusive state automatically get cleared in exception events (this is different from Cortex-A in Armv7-A, but I think Armv8-A clear exclusive state automatically as well).
https://developer.arm.com/docs/ddi0403/e/armv7-m-architecture-reference-manual
Section A3.4.4 Context switch support
"It is necessary to ensure that the local monitor is in the Open Access state after a context switch. In ARMv7-M, the local monitor is changed to Open Access automatically as part of an exception entry or exit sequence. The local monitor can also be forced to the Open Access state by a CLREX instruction."
Hope this cleared your concern.
regards,
Joseph
Wonderful! Then it make a lot more sense to use....
I figured that Arm Engineers would have thought through this, but could not find enough details online to figure it out.
Thanks
Trampas
You're welcome :-)