This discussion has been locked.
You can no longer post new replies to this discussion. If you have a question you can start a new discussion

Could anybody tell me how to boot up a processor in AARCH32 bit mode in Arm V8 and A53 core?

can you please tell me how to boot up a processor in 32 bit mode for Armv8, A53 core using baremetal code?

how can i know it is booted in 32bit mode?

Thanks.

Parents
  • When the A53 comes out of reset, the initial Execution state (AArch32 or AArch64) is controlled by a signal AA64nAA32

    http://infocenter.arm.com/help/topic/com.arm.doc.ddi0500g/BABJAGDF.html

    This sets the Execution state of EL3, and this cannot be changed without another reset.

    The Execution state of lower ELs (EL2/EL1/EL0) is set by software and can be changed dynamically.  For example, to drop from EL3 (using AArch64) to EL2 (using AArch32):

      MSR      SCTLR_EL2, xzr
    
      MOV      w1, wzr
      ORR      w1, w1, #1          ; Set NS bit
      ORR      w1, w1, #(1 << 8)   ; Set HCE bit (enabled HVC)
      MSR      SCR_EL3, x1
    
      ADR      x1, el2_entry_aarch32
      MSR      ELR_EL3, x1
    
      LDR      x1, =0x1A            ; Bit pattern AArch32 Hyp mode
      MSR      spsr_el3, x1
    
      ERET

    Where "el2_entry_aarch32" is a label giving the address in EL2 to be entered at.

Reply
  • When the A53 comes out of reset, the initial Execution state (AArch32 or AArch64) is controlled by a signal AA64nAA32

    http://infocenter.arm.com/help/topic/com.arm.doc.ddi0500g/BABJAGDF.html

    This sets the Execution state of EL3, and this cannot be changed without another reset.

    The Execution state of lower ELs (EL2/EL1/EL0) is set by software and can be changed dynamically.  For example, to drop from EL3 (using AArch64) to EL2 (using AArch32):

      MSR      SCTLR_EL2, xzr
    
      MOV      w1, wzr
      ORR      w1, w1, #1          ; Set NS bit
      ORR      w1, w1, #(1 << 8)   ; Set HCE bit (enabled HVC)
      MSR      SCR_EL3, x1
    
      ADR      x1, el2_entry_aarch32
      MSR      ELR_EL3, x1
    
      LDR      x1, =0x1A            ; Bit pattern AArch32 Hyp mode
      MSR      spsr_el3, x1
    
      ERET

    Where "el2_entry_aarch32" is a label giving the address in EL2 to be entered at.

Children