Arm Community
Arm Community
  • Site
  • User
  • Site
  • Search
  • User
Arm Community
Arm Community
  • Jump...
  • Cancel
  • New
More developer forums
No results could be found.
Related tags
  • AMBA
  • Armv8-A
  • Cortex-A
  • Cortex-M
  • Cortex-M4
  • GCC
  • Keil
  • Keil C166 Tools
  • Keil C251 Tools
  • Keil C51 Tools
  • Keil MDK
  • Linux
  • Mali-GPU
  • Microcontroller (MCU)
  • OpenGL ES

Forums

  • Servers and Cloud Computing forum

    The latest forum discussions about the Arm Servers and Cloud Computing ecosystem for cloud native edit to cloud application development and deployment.
    101 questions
    romain beurdouche
    RE: ArmRAL: Wrong usage of k0 in LDPC rate matching 8 months ago
  • SoC Design and Simulation forum

    The latest forum discussions for community-based support for System-on-Chip (SoC) and Arm simulation models.
    713 questions
    Colin Campbell
    RE: AHB: Address and control signal stable during waited write access 6 days ago Arm Employee Badge
  • SystemReady Forum

    The SystemReady forum covers all aspects of the Arm SystemReady compliance program, including associated specifications (BSA, SBSA, BBR), Architecture Compliance Suite (ACS) testing, and implementation considerations for pre-silicon and SystemReady bands.
    15 questions
    vstehle
    RE: How to run ARM ACS 7 months ago Arm Employee Badge
  • TOSA forum

    Tensor Operator Set Architecture (TOSA) provides a set of whole-tensor operations commonly employed by Deep Neural Networks.
    1 question
    Oliver Beirne
    RE: Forum FAQs 2 months ago Arm Employee Badge
  • 恩智浦汽车电子MCU讨论区博

    4 questions
    Song Bin 宋斌
    RE: [TRK-KEA64使用经验分享] 开箱体验 亮瞎我的双眼 over 10 years ago Arm Employee Badge
<
All questions in this Community
  • Not Answered

    ARM: Specifying callers of indirect function calls for --callgraph option 0

    • Keil MDK
    818 views
    0 replies
    Started over 6 years ago
    by David Martin
  • Not Answered

    Use __attribute__ Error L6406E, L6407E 0

    • Keil MDK
    3633 views
    1 reply
    Latest over 6 years ago
    by Andrew Neil
  • Not Answered

    How to set the const variable I want in the last position of FLASH 0

    • Keil MDK
    2004 views
    2 replies
    Latest over 6 years ago
    by Westonsupermare Pier
  • Not Answered

    Issues with VLA and Keil 0

    • Microcontroller (MCU)
    1973 views
    3 replies
    Latest over 6 years ago
    by Dave Crabs
  • Not Answered

    DS-5 ignores dependencies for assembly files. 0

    • Arm Compiler 6
    • DS-5 Ultimate Edition
    • DS-5 Community Edition
    15726 views
    1 reply
    Latest over 6 years ago
    by Nick S.
  • Answered

    aarch64 Exception Level Sw itch from EL1 to EL0 0

    • EL1
    • EL3
    • AArch64
    • Raspberry Pi 3
    • EL0
    • QEMU
    • Cortex-A
    16992 views
    7 replies
    Latest over 6 years ago
    by michaelyuanfeng
  • Suggested Answer

    How to handle clean operation in Data Cache 0

    • Cache coherency
    19169 views
    1 reply
    Latest over 6 years ago
    by Christopher Tory Arm Employee Badge
  • Suggested Answer

    How to handle Cache flush in ACE? 0

    • AMBA
    • ACE
    • Cache
    • Interface
    16994 views
    1 reply
    Latest over 6 years ago
    by Christopher Tory Arm Employee Badge
  • Not Answered

    when I count the cycle of instructions in A53, I just want the cycle not including operation of memory and cache, which performance counts i should remove? thanks a lot! 0

    • Cortex-A53
    • Cache
    • Cortex-A
    • Memory
    9928 views
    0 replies
    Started over 6 years ago
    by sam0220
  • Not Answered

    Development Boards for ML Processor 0

    • machine learning
    • Neural Network
    • Internet of Things (IoT)
    6734 views
    2 replies
    Latest over 6 years ago
    by Jason Andrews Arm Employee Badge
  • Not Answered

    ldr and fmla instruction time consumption issue. 0

    19800 views
    8 replies
    Latest over 6 years ago
    by arthur_libin
  • Answered

    MMU and Cache configuration 0

    • Cortex-A5
    • Cache
    • Memory Management Unit (MMU)
    • Cortex-A
    24169 views
    12 replies
    Latest over 6 years ago
    by Vanhealsing
  • Answered

    Significance of [MS] and [LS] in big-endian data bus in AHB5 Specification +1

    • AMBA
    • AHB5
    • AMBA 5
    • AHB
    13996 views
    1 reply
    Latest over 6 years ago
    by Colin Campbell Arm Employee Badge
  • Not Answered

    Cannot find definition of extern function, reference only 0

    • Microcontroller (MCU)
    2850 views
    3 replies
    Latest over 6 years ago
    by Andrew Neil
  • Not Answered

    aarch64 MMU: inconsistency in ARMv8 ARM? 0

    • logic
    • Armv8-A
    • Memory Management Unit (MMU)
    • Memory Management
    14779 views
    1 reply
    Latest over 6 years ago
    by Zhifei Yang
<>