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Operating Systems forum
The latest forum discussions for all Arm technology relating to Operating Systems (OS)
272
questions
UEFI variables from UEFI shell
2 months ago
Servers and Cloud Computing forum
The latest forum discussions about the Arm Servers and Cloud Computing ecosystem for cloud native edit to cloud application development and deployment.
101
questions
RE: ArmRAL: Wrong usage of k0 in LDPC rate matching
5 months ago
SoC Design and Simulation forum
The latest forum discussions for community-based support for System-on-Chip (SoC) and Arm simulation models.
705
questions
Compatibility of PWAKEUP of APB completer with Q-channel compliant clock controller
3 days ago
SystemReady Forum
The SystemReady forum covers all aspects of the Arm SystemReady compliance program, including associated specifications (BSA, SBSA, BBR), Architecture Compliance Suite (ACS) testing, and implementation considerations for pre-silicon and SystemReady bands.
15
questions
RE: How to run ARM ACS
4 months ago
恩智浦汽车电子MCU讨论区博
4
questions
RE: [TRK-KEA64使用经验分享] 开箱体验 亮瞎我的双眼
over 9 years ago
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Not Answered
IP4 address changing problem(netIF_SetOption )
0
STM32 F1
CMSIS
1152
views
0
replies
Started
over 5 years ago
by
John.Jin
Not Answered
Delay in aarch64-elf-gdb symbol parsing
0
AArch64
2071
views
1
reply
Latest
over 5 years ago
by
GoGaK
Answered
DWT instruction address
0
CoreSight Debug and Trace
Cortex-M33
Armv8-M
3654
views
2
replies
Latest
over 5 years ago
by
Lica
Not Answered
cortex M33 multicore debug resources
0
2815
views
3
replies
Latest
over 5 years ago
by
Sinie
Suggested Answer
ARM64 Linaro toochain Link error ( R_AARCH64_ADR_PREL_PG_HI21 )
0
16106
views
2
replies
Latest
over 5 years ago
by
Kishan Patel
Not Answered
Porting to U-boot driver model and device tree control (for ARM-based design)
0
Peripheral Devices
U-Boot
11766
views
1
reply
Latest
over 5 years ago
by
rwl
Not Answered
Reading Non-Secure PENDSVSET after re-entry into Secure PendSV
0
2941
views
2
replies
Latest
over 5 years ago
by
42Bastian Schick
Answered
How to make variables in continuously memory?
+1
2803
views
6
replies
Latest
over 5 years ago
by
Andy Neil
Not Answered
Compilation error: A1859E: Flag preserving form of this instruction not available
0
Microcontroller (MCU)
14440
views
26
replies
Latest
over 5 years ago
by
SRAO
Not Answered
About the snoop filter in CCI 550
0
Cache coherency
CoreLink CCI-550 Cache Coherent Interconnect
13273
views
0
replies
Started
over 5 years ago
by
zilly
Answered
lpc1768 no USB Host component?
0
2484
views
3
replies
Latest
over 5 years ago
by
Kev
Answered
GDB and axf file
+1
2024
views
1
reply
Latest
over 5 years ago
by
Andy Neil
Answered
Cannot access memory of LPC1769
0
2473
views
1
reply
Latest
over 5 years ago
by
Jan Claussen
Suggested Answer
Fail to run the Ds5 example project "Armv8-A SMP AArch64 Startup Code for Linaro bare-metal GCC - Arm DS-5 "
0
12150
views
1
reply
Latest
over 5 years ago
by
Ronan Synnott
Answered
Cortex-A53 direct access to cache: How are instructions encoded in the L1 I-cache?
0
Cortex-A53
Cache
Cortex-A
22367
views
4
replies
Latest
over 5 years ago
by
zilly
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