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Forums

  • Operating Systems forum

    The latest forum discussions for all Arm technology relating to Operating Systems (OS)
    272 questions
    Cantaff0rd
    UEFI variables from UEFI shell 3 months ago
  • Servers and Cloud Computing forum

    The latest forum discussions about the Arm Servers and Cloud Computing ecosystem for cloud native edit to cloud application development and deployment.
    101 questions
    romain beurdouche
    RE: ArmRAL: Wrong usage of k0 in LDPC rate matching 6 months ago
  • SoC Design and Simulation forum

    The latest forum discussions for community-based support for System-on-Chip (SoC) and Arm simulation models.
    707 questions
    Christopher Tory
    RE: Request for Support: Handling Outstanding Transactions and Channel Slice Management 5 days ago Arm Employee Badge
  • SystemReady Forum

    The SystemReady forum covers all aspects of the Arm SystemReady compliance program, including associated specifications (BSA, SBSA, BBR), Architecture Compliance Suite (ACS) testing, and implementation considerations for pre-silicon and SystemReady bands.
    15 questions
    vstehle
    RE: How to run ARM ACS 5 months ago Arm Employee Badge
  • 恩智浦汽车电子MCU讨论区博

    4 questions
    Song Bin 宋斌
    RE: [TRK-KEA64使用经验分享] 开箱体验 亮瞎我的双眼 over 9 years ago Arm Employee Badge
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All questions in this Community
  • Not Answered

    Can't get conditional compile to work in .s file 0

    • Keil MDK
    2895 views
    4 replies
    Latest over 8 years ago
    by Parag Shah
  • Suggested Answer

    Where to find the execution cycles of Cortex m7 instruction 0

    • Cortex-M0
    • Cortex-M7
    • Cortex-M3
    • Cortex-M
    • Cortex-M4
    25486 views
    9 replies
    Latest over 8 years ago
    by tyskin
  • Not Answered

    How does device access work in AEMv8 models? 0

    • models
    • AXI
    7415 views
    1 reply
    Latest over 8 years ago
    by Martin Weidmann Arm Employee Badge
  • Answered

    OpenGL ES SDK for Linux +1

    • OpenGL ES
    8830 views
    4 replies
    Latest over 8 years ago
    by gaborpapp
  • Suggested Answer

    Combining function attributes in C 0

    • C
    7011 views
    2 replies
    Latest over 8 years ago
    by vinkot Arm Employee Badge
  • Not Answered

    Intercore interrupts on a53 between EL1 and EL3 0

    • Cortex-A53
    • Cortex-A
    5911 views
    1 reply
    Latest over 8 years ago
    by Peter Rielly Arm Employee Badge
  • Not Answered

    Debugging the global variable overwritten 0

    • Keil C51 Tools
    928 views
    2 replies
    Latest over 8 years ago
    by Andy Neil
  • Not Answered

    I2C transmit & receive between ALS OPT3006 & 8051 0

    • Keil C51 Tools
    1167 views
    2 replies
    Latest over 8 years ago
    by ²erik malund
  • Answered

    Cache Allocation Technology 0

    • AArch64
    • Cache
    • Cortex-A
    • Cortex-A8
    • AArch32
    7044 views
    2 replies
    Latest over 8 years ago
    by daith
  • Not Answered

    What are principles and wiring diagrams for ballast controllers ? 0

    • Microcontroller (MCU)
    1536 views
    2 replies
    Latest over 8 years ago
    by kiley harry
  • Answered

    how pc is updated during execution of SWI and any simple instruction like mov R1,R15? +1

    • R15 (PC Program Counter)
    • Armv4T
    • Arm7
    • R14 (LR Link Register)
    • Arm Assembly Language (ASM)
    11793 views
    8 replies
    Latest over 8 years ago
    by Matt Sealey Arm Employee Badge
  • Not Answered

    Access Violation Error LPC1768 Simulation 0

    • Keil MDK
    2658 views
    4 replies
    Latest over 8 years ago
    by Kanhaiya Mishra
  • Not Answered

    AMP system on Cortex-A9. How to do it? 0

    • Arm Development Studio
    • Cortex-A9
    • Cortex-A
    • Arm Compiler 5
    9675 views
    1 reply
    Latest over 8 years ago
    by Matt Sealey Arm Employee Badge
  • Suggested Answer

    ARM Cortex A8 L2 Cache Flush Invalidate 0

    • Cortex-A
    • Cortex-A8
    9976 views
    5 replies
    Latest over 8 years ago
    by Matt Sealey Arm Employee Badge
  • Answered

    Excepted Practice for NS writes after setting M33 SAU.ALLNS 0

    • TrustZone
    • Armv8-M
    • Block
    7112 views
    1 reply
    Latest over 8 years ago
    by Peter Rielly Arm Employee Badge
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