by Joseph Yiu & Ian Johnson
While the majority of Cortex-M processor-based microcontrollers are single core designs, some new microcontrollers with multiple Cortex-M processors are also available. As multi-core designs are increasing in popularity and complexity, the methodologies of designing multi-core Cortex-M systems are becoming more critical. This paper introduces typical system level designs for multi-core Cortex-M microcontrollers and some of the various factors that need to be considered when designing the memory system, together with low power support and additional hardware to allow multi-core systems to work effectively. This paper also covers example debug subsystems for multi-core designs, the features typically needed in multiple core debug systems, such as debug event communication; and the way in which the Processor Integration Layer in ARM’ CoreSight™ SoC debug and trace technology supports the required debug functionality.