ARMCC: How to generate assembly

Thank you, but still the .s file here is not something I'm looking for. So for example, for the following dummy 'C' code

#include <stdio.h>
#include <stdint.h>

typedef struct data_t {
        uint32_t        a;
        uint16_t        b;
} data_t;


static void WriteS32(uint32_t x, uint32_t y)
{
        data_t testdata;
        testdata.a = x;
        testdata.b = y;
}

static void ReadS32(data_t emp)
{
        uint32_t x = emp.a;
        uint32_t y = emp.b;
}

I, get the following .s file

; generated by Component: ARM Compiler 5.06 update 6 (build 750) Tool: armcc [4d3637]
; commandline armcc [-c --asm test.c]
THUMB
PRESERVE8

AREA ||.arm_vfe_header||, DATA, READONLY, NOALLOC, ALIGN=2

DCD 0x00000000

IMPORT ||Lib$$Request$$armlib|| [CODE,WEAK]

ATTR FILESCOPE
ATTR SETVALUE Tag_ABI_PCS_wchar_t,2
ATTR SETVALUE Tag_ABI_enum_size,1
ATTR SETVALUE Tag_ABI_optimization_goals,3
ATTR SETVALUE AV,18,1

ASSERT {ENDIAN} = "little"
ASSERT {INTER} = {FALSE}
ASSERT {ROPI} = {FALSE}
ASSERT {RWPI} = {FALSE}
ASSERT {IEEE_FULL} = {FALSE}
ASSERT {IEEE_PART} = {FALSE}
ASSERT {IEEE_JAVA} = {FALSE}
END

However, when I try a similar thing with the gcc and objdump on a x86_64 Linux based system, i get the following code:

$ gcc -c test.c -o test.o
$ objdump -d test.o

test.o:     file format elf64-x86-64


Disassembly of section .text:

0000000000000000 <WriteS32>:
   0:	55                   	push   %rbp
   1:	48 89 e5             	mov    %rsp,%rbp
   4:	89 7d ec             	mov    %edi,-0x14(%rbp)
   7:	89 75 e8             	mov    %esi,-0x18(%rbp)
   a:	8b 45 ec             	mov    -0x14(%rbp),%eax
   d:	89 45 f0             	mov    %eax,-0x10(%rbp)
  10:	8b 45 e8             	mov    -0x18(%rbp),%eax
  13:	66 89 45 f4          	mov    %ax,-0xc(%rbp)
  17:	90                   	nop
  18:	5d                   	pop    %rbp
  19:	c3                   	retq   

000000000000001a <ReadS32>:
  1a:	55                   	push   %rbp
  1b:	48 89 e5             	mov    %rsp,%rbp
  1e:	48 89 7d e0          	mov    %rdi,-0x20(%rbp)
  22:	8b 45 e0             	mov    -0x20(%rbp),%eax
  25:	89 45 f8             	mov    %eax,-0x8(%rbp)
  28:	0f b7 45 e4          	movzwl -0x1c(%rbp),%eax
  2c:	0f b7 c0             	movzwl %ax,%eax
  2f:	89 45 fc             	mov    %eax,-0x4(%rbp)
  32:	90                   	nop
  33:	5d                   	pop    %rbp
  34:	c3                   	retq   

I need something similar with ARMCC and probably with use of fromelf

Ah, ok - I misunderstood what sort of output you wanted to see.  Yes, fromelf will is the tool you want and it is the "-c" flag that gives you disassembly output. 

I think the problem for your test case is that compiler is being clever.  It's detected that the two functions are static and not referenced, and has performed redundant code elimination.  As a result you end up with an empty file.  It's something I've hit when creating small test cases before, the compiler optimizes code away if it doesn't do anything.

For your test, a couple of tweaks should stop the compiler optimizing everything out.  Removing static from the function definitions gives:

** Section #1 '.text' (SHT_PROGBITS) [SHF_ALLOC + SHF_EXECINSTR]
    Size   : 8 bytes (alignment 4)
    Address: 0x00000000

    $a
    .text
    WriteS32
        0x00000000:    e12fff1e    ../.    BX       lr
    ReadS32
        0x00000004:    e12fff1e    ../.    BX       lr

So now the functions are there.  But the compiler has still worked out that the code is ultimately "redundant" and made reduced them to stubs.

Modifying the functions to reference a global structure, rather than a local one, and having the read function return something:

** Section #1 '.text' (SHT_PROGBITS) [SHF_ALLOC + SHF_EXECINSTR]
    Size   : 40 bytes (alignment 4)
    Address: 0x00000000

    $a
    .text
    WriteS32
        0x00000000:    e59f201c    . ..    LDR      r2,[pc,#28] ; [0x24] = 0
        0x00000004:    e5820000    ....    STR      r0,[r2,#0]
        0x00000008:    e1c210b4    ....    STRH     r1,[r2,#4]
        0x0000000c:    e12fff1e    ../.    BX       lr
    ReadS32
        0x00000010:    e92d4003    .@-.    PUSH     {r0,r1,lr}
        0x00000014:    e1dd00b4    ....    LDRH     r0,[sp,#4]
        0x00000018:    e59d1000    ....    LDR      r1,[sp,#0]
        0x0000001c:    e0800001    ....    ADD      r0,r0,r1
        0x00000020:    e8bd800c    ....    POP      {r2,r3,pc}
    $d
        0x00000024:    00000000    ....    DCD    0

thanks a ton :)

Thanks for this information

Thanks for this information