Inconsistency in latest AXI4 specification (version g) regarding INCR burst transfers.

There seems to be a slight inconsistency in the following paragraph about INCR burst transfers on page A3-50:
 
In an incrementing burst, the address for each transfer in the burst is an increment of the address for the previous transfer. The increment value depends on the size of the transfer. For example, the address for each transfer in a burst with a size of 4 bytes is the previous address plus four.
 
This seems to suggest that the increment is always fixed, especially with the given example. However, if the address is unaligned, then this is not true for the first increment. That is, the increment between Address_2 and Address_1 will be strictly less than Number_Bytes.
It's a minor issue but it left me scratching my head for a while.
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