• State Not Answered
  • Replies 2 replies
  • Subscribers 71 subscribers
  • Views 4852 views
  • Users 0 members are here
Related

quiery about AHB burst mode

Harsharaj ellur
Offline over 6 years ago
Note: This was originally posted on 19th November 2008 at http://forums.arm.com

hi,

in the AHB burst mode is it the Master that drives consecutive address to slave, or is it that the master only sends the start address and Slave using this, HSIZE and HBURST calculates the next addresses in the burst??

if its the master who is driving consecutive address then why does it also have to send HSIZE and HBURST to slave?

And if it the Slave that is figuring it out asto what the next address in the burst is then why does the Timing diagram show that master is sending the addresses?
Parents
  • 0 Offline over 6 years ago
    Note: This was originally posted on 19th November 2008 at http://forums.arm.com

    Hello Hertz,

    > in the AHB burst mode is it the Master that drives consecutive
    > address to slave, or is it that the master only sends the start
    > address and Slave using this, HSIZE and HBURST calculates
    > the next addresses in the burst??

    The master drives the address for every beat of a burst, not just the start address.

    > if its the master who is driving consecutive address then why
    > does it also have to send HSIZE and HBURST to slave?

    Simple slaves will just treat bursts as a series of individual transfers, so they need an address for each transfer.

    More complex slaves can use the burst and size information to complete the burst transfer more efficiently (for example accessing DRAM).

    Having the master provide both the address for each transfer, and the complete burst information, allows the most flexibility for slave designers.

    > And if it the Slave that is figuring it out asto what the next
    > address in the burst is then why does the Timing diagram
    > show that master is sending the addresses?

    As you are seeing diagrams where the master IS driving the address for each transfer, you probably already knew the answer to your first question ;)

    I am guessing you are comparing AHB to AXI, where in AXI only the start address is signaled, and the slave has to calculate the other addresses for a burst of transfers.

    AXI tries to reduce the bandwidth requirements on the address channels by only sending the start address,

    AHB tries to reduce the amount of duplicated address incrementer logic in each slave by issuing an address for each transfer in a burst.

    JD
Reply
  • 0 Offline over 6 years ago
    Note: This was originally posted on 19th November 2008 at http://forums.arm.com

    Hello Hertz,

    > in the AHB burst mode is it the Master that drives consecutive
    > address to slave, or is it that the master only sends the start
    > address and Slave using this, HSIZE and HBURST calculates
    > the next addresses in the burst??

    The master drives the address for every beat of a burst, not just the start address.

    > if its the master who is driving consecutive address then why
    > does it also have to send HSIZE and HBURST to slave?

    Simple slaves will just treat bursts as a series of individual transfers, so they need an address for each transfer.

    More complex slaves can use the burst and size information to complete the burst transfer more efficiently (for example accessing DRAM).

    Having the master provide both the address for each transfer, and the complete burst information, allows the most flexibility for slave designers.

    > And if it the Slave that is figuring it out asto what the next
    > address in the burst is then why does the Timing diagram
    > show that master is sending the addresses?

    As you are seeing diagrams where the master IS driving the address for each transfer, you probably already knew the answer to your first question ;)

    I am guessing you are comparing AHB to AXI, where in AXI only the start address is signaled, and the slave has to calculate the other addresses for a burst of transfers.

    AXI tries to reduce the bandwidth requirements on the address channels by only sending the start address,

    AHB tries to reduce the amount of duplicated address incrementer logic in each slave by issuing an address for each transfer in a burst.

    JD
Children
No data
More questions in this forum

View all questions in SoC Design forum