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SoC Design blog A painless upgrade to 22nm – the right cost with the available IP
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A painless upgrade to 22nm – the right cost with the available IP

Claudia Pike
Claudia Pike
August 27, 2020

Does your ASIC design require the lowest leakage and smallest area possible? Do you want to adopt the FinFET technology but are concerned about the expensive wafer cost? The TSMC 22nm process offers a compelling option. We are seeing many Arm partners who have used processes in 28nm, 40nm, and above, now migrating to 22nm to achieve lower leakage and a smaller area to maintain or even boost the desired performance.

The TSMC 22nm technology was developed based on TSMC’s industry-leading 28nm process, a preferred foundry solution for many different market segments in terms of its performance, power, and area scaling. However, some IC designers are looking for an economical way to meet the requirements for performance boost and lower supply voltage in applications such as digital TVs, set-up boxes, smartphones, and consumer products. For such IC designs, TSMC 22nm is the best way to increase performance and reduce power cost-effectively, which provides significant area reduction, speed gain, and power reduction compared to 28nm process.

One of Arm’s partners, Ambiq Micro, a leading licensor of wireless connectivity and smart sensing technologies, has been working with Arm to upgrade from 40nm to 22nm. Ambiq used Arm IP, including Cortex-M, Crypto, CoreSight SoC-400, ETM, TSMC 22ULL memories, and TGO libraries to achieve subthreshold leakage with embedded security. Some of the benefits of the Arm solution included:

  • The ULL-ULL memory compilers with the UHVT/HVT device provided the lowest possible leakage while meeting performance up to 500MHz.
  • 6V periphery voltage support helped reduce power for IOT applications.
  • The Thick Gate Oxide (TGO) reduced leakage further since special level shifters are designed to interface between 0.8v to 3.3v between the thin and thick gate oxide.

Based on Ambiq’s feedback, Arm Artisan memory compilers helped shrink area by 5 percent and reduce leakage by 4 percent compared to competitor IP, while meeting the same performance criteria.

TSMC supports Artisan memory compilers for TSMC 22nm ULP and ULL process technologies. These compilers are optimized for low-leakage and low-power requirements. For more details about Ambiq’s latest ultra-low power and high-performance design and how Arm solutions can help, please visit Ambiq and Arm at TSMC Virtual Technology Symposiums and OIP Ecosystem Forums online.

 Accelerating ultra low power SoC Designs

Find out more about Arm Physical IP

There are currently more than 40 customers actively using Arm’s physical IP on TSMC 22nm process. Join the growing crowd making this painless migration. Our goal is to help our partners succeed, so contact us for your physical IP, and POP IP design needs today.

Anonymous
SoC Design blog
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