Self hosted debug on Cortex A53, setting up a breakpoint to cause an exception.

In my bare metal OS running in AArch32 on a Raspberry Pi 3B, I have debug module that responds to exceptions including the breakpoint instruction. I am trying to use the debug capabilities of the processor as described in the Arm8 manual and the Cortex A53 manual.

The processor is running in system mode (0x1F). Only one core is running. I have not turned on security mode.

First I enable breakpoints in the DBGDSCRext register:

mrc    p14, 0, r0,c0,c2,2

orr      r0,#0x8000        @DBGDSCRext.MDBGen

mcr    p14, 0, r0,c0,c2,2

Then set the breakpoint value

mov    r0,0x8200         @address of code I want to break on

mcr    p14,0,r0,c0,4     @DBGBVR0

Then enable it

mov    r0,#1                  @enable flag on a address match type

mcr    p14,0,r0,c0,5     @DBGBCR0

I'm expecting this to cause an exception just like the breakpoint instruction does (bkpt), but nothing happens when I cause the target code to execute. Can someone see what I am missing?

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