How is AXI addressing scheme work for this problem?

Hi, I am not confident about my thinking so wanted to clear it.

Let's say  DATA_WIDTH= 64 bits


                AWSIZE=1 ( 2 Bytes data transfer)

                AWBURST= FIXED

According to me on every transfer data strobe will be in WSTRB= 00001000 (I.e. only address x03 will have valid data). So there will be transfer of only 1 byte even though the request is for 2 bytes transfer. This is due to the unalignment of ADDR. 

Please let me know is this correct implementation?


  • AWSIZE tells you the maximum number of bytes that can be transferred in each AXI transfer; AWADDR (when not AWSIZE aligned) tells you within that AWSIZE range how many byte lanes can actually be used.

    So yes, each transfer in a FIXED transaction with AWSIZE=1 (2 bytes) and AWADDR signaling an unaligned address, means one byte per transfer maximum.

    If AWADDR=0x03 in your example this means that you can only use WSTRB=8'b00001000 or 8'b00000000 for each of the 4 transfers in the AWLEN=3 transaction, so a maximum of 4 bytes (and minimum of 0 bytes) can be transferred.

    Note that in FIXED bursts the unaligned address doesn't change for each transfer (because it is "fixed"), so each transfer remains unaligned. But in INCR bursts it is only the first transfer that is unaligned, and all subsequent transfers in an INCR transaction can use the full number of AWSIZE indicated byte lanes. WRAP transaction types cannot have unaligned addresses.

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