I was wondering if anyone knows of a way to force the Cortex-M7 CPU to take a precise exception when a bus fault occurs. I'm writing an application that requires the bus fault handler to know the exact address of the instruction that generated the bus fault so it can take remedial action. Apparently this is possible in the Cortex-M3 and M4 CPUs by setting the DISDEFWBUF bit to 1 in the Aux Control Register, which disables the load/store buffer. I can't seem to find an analogous feature in the M7 (perhaps because the M7 has a cache and the M3/4 don't?). I would like to avoid writing code to search back through instructions to find one that may have caused an exception because that seems like it could get complicated. I'd also like to avoid disabling the cache.
View all questions in Cortex-A / A-Profile forum