Dose ARMv8 CPU need DSB/DMB between address/data dependency write read cmd?

I have a question arout ARM CPU DSB/DMB

If I want :

1.write address A

2.read address B

Because of ARMv8 is Weak Consistency, the processor may execute in this order:

1.read address B

2.write address A

If I wand keep the program order, I need add DSB/DMB:

1.write address A

2.DSB/DMB

2.read address B

The read and write addresses in the above example are independence.

The question is  if write/read cmd is address dependency. For example, I read a data from CSR and store it in DRAM, and then read the data in DRAM to next operation:

1.read address B

2.write address A

3.read address A

Do I need add DSB/DMB between step 2 and 3 to make sure the order?

1.read address B

2.write address A

3. need DSB/DMB ?

4.read address A