Outlined in my previous blog, the recent trends in the automotive industry are driving the need for zonal controller and domain controller in the vehicle architecture. I indicated that Armv8-R based cores – the Cortex-R52 and Cortex-R52+ - are ideally suited for addressing the design and performance needs of zonal and domain controller. Cortex-R52 and Cortex-R52+ have been widely adopted in automotive designs both in standalone microcontrollers (MCUs) and heterogeneous designs coupled with Cortex-A cores.
The need for more features and functions is amplifying the compute needs within the vehicles. Zonal controllers are not being left behind in this pursuit of higher performance. There is an increasing need for higher performance zonal controller to address the application consolidation trend triggered by emerging EE architecture. There can be design scenarios where multiple clusters of Cortex-R52 and Cortex-R52+ will be needed to fulfill the performance requirements.
To address the high-performance needs in zonal controller, Arm introduced the Cortex-R82AE, which is based on the Armv8-R64 architecture. The recently announced Cortex-R82AE core is now available for partners to license and deploy in their designs. This is the first Automotive Enhanced (AE) processor implementing the Armv8-R64 architecture and offers advanced functional safety and high single thread performance. Cortex-R82AE expands the performance boundaries and offers an upgrade path for automotive partners to scale their product families.
Cortex-R82AE expands the reach of the widely adopted Cortex-R family in the automotive market. It is a 64-bit processor which supports up to 8 cores per cluster. The memory system is enhanced to offer higher performance with wider cluster ports and a shared L2 cache. With the support for coherency within a cluster and among clusters, Cortex-R82AE simplifies the software development for higher compute symmetric-multiprocessing (SMP) designs.
Also, with an optional Memory Management Unit (MMU), it is the first automotive-enhanced Cortex-R processor to support rich operating systems like Linux, Adaptive AUTOSAR . Alongside the MMU, like other cores in Cortex-R family, Cortex-R82AE also has a Memory Protection Unit (MPU). It supports real-time virtualization that enables the core to run both rich OS and RTOS, like Zephyr, FreeRTOS and Classic AUTOSAR, on a single core. The hypervisor ensures freedom-from-interference (FFI) among the virtual machines running separate software components.
Cortex-R82AE can be deployed in heterogeneous designs coupled with an application processor like the Cortex-A cores. The support for large address width simplifies the system integration as both the application cores’ cluster and Cortex-R82AE cluster have the uniform memory view. One of the primary use cases of Cortex-R82AE in such heterogenous designs is to act as Safety Island. The purpose of the Safety Island is to carry out fault-reporting and validate actuation of the application processor. It can also be used for real-time tasks, boot orchestration and system testing.
To address the emerging needs in zonal controller and Safety Island designs, existing partners of Cortex-R52 and Cortex-R52+ will explore upgrading to Cortex-R82AE in their upcoming products. To support this endeavor, Arm has developed a guide that advises partners on how to migrate their existing software to Cortex-R82AE based designs. This guide will also be helpful for new developments on Cortex-R82AE. Alongside offering guidance on migrating software, the guide addresses the key differences between the Armv8-R A32 based Cortex-R52/52+ and Armv8-R A64 based Cortex-R82AE. It covers the following sections:
This section lists out the different instruction sets used on the Armv8-R A32 and Armv8-R A64 architectures. It also mentions the differences in the floating-point support and register set between these two architectures.
Gets into the details of the exception vector table and exception handling across these two architectures.
Armv8-R A32 only supports physical address; however, Armv8-R A64 also supports virtual memory. This section talks about the memory map and Virtual Memory System Architecture (VMSA), which is supported only by Armv8-R A64.
Gives a deep dive into the System register included in these two architectures.
Cortex-R82AE supports only secure state, so it can initiate both normal and secure memory access. However, the Armv8-R A32 based Cortex-R52/52+ only supports normal state.
By using a EL2 MPU, both Cortex-R82AE and Cortex-R52/52+ cores support virtualization that ensures freedom from interference (FFI) among multiple mixed-critical software components running on same device. However, Cortex-R82AE has an optional EL1 MMU that makes it suitable for simultaneously running rich-operating system like Linux, in a virtual machine, and real-time operating system using the EL1 MPU.
This section offers tips and guidance on compilation options for Cortex-R52/52+ and Cortex-R82AE based development.
With the capability of connecting to large memories and higher performance, Cortex-R82AE will help partners to carry out more processing without compromising on real-time requirements in domain and zonal controllers’ designs. This guide offers detailed guidance on the key differences between the widely adopted Cortex-R52/52+ and the new high-performance Cortex-R82AE. It will be useful for developers who are familiar with the Cortex-R52/52+ cores and interested in migrating their software over to Cortex-R82AE based designs. For the new developments on Cortex-R82AE, this guide can also be beneficial.
Read the Software Migration Guide from Armv8-R AArch32 to Armv8-R AArch64.
Read Guide