Architectures and Processors blog

Views from the Arm technical leadership team that it believes that today, the cost implications of tightening C++ relaxed atomics outweigh its benefit.

This is the second and final part of the blog series on Dev Testing in .NET. In this part we look at further uses of SuperPMI and fuzzing with Fuzzlyn.

In part 1, we look at how .NET uses environment variables, some detailed IR dumps and SuperPMI.

The latest features and updates that have been added to Arm's A-Profile architecture in 2023.

This is the final part of the blog series on If Conversion in .NET. In this third post, we will look at some additional variations.

This blog series gives an overview of the recently added If Conversion pass, with part two looking at the the lowering phase.

This blog series gives an overview of the recently added If Conversion pass, with part one looking at the optimise bools optimisation.

Part 3. This blog introduces how to enable PMU feature in Armv8-A CPUs and provides an example of performance analysis workflow on real Armv8-A platform.

Part 2. This blog introduces how to enable PMU feature in Armv8-A CPUs and provides an example of performance analysis workflow on real Armv8-A platform.

This blog post introduces how to enable PMU feature in Armv8-A CPUs and provides an example of performance analysis workflow on real Armv8-A platform.

This blog describes how to add Arm Scalable Vector Extension (SVE) support to a SIMD library. It also introduces SVE features and programming tips.

A quick look at Neon intrinsics in Rust. This will explain the status of the intrinsics in the Rust compiler. We will also show how they differ from C.

With new open-source patches for the Realm Management Extension (RME) now available, this blog explores latest developments and techniques for confidential computing on Arm.

This blog introduces Arm optimization practices with two solid examples from Apache Arrow project.

This guest blog shows how 64-bit Neon technology can be used to improve performance in image processing applications.

2022 additions to Arm A-Profile architecture covering Virtual Memory System Architecture, SME2 and mitigating some ROP attacks with Guarded Control Stack.

Arm is adding support in both the CPU and Generic Interrupt Controller (GIC) architecture for NMIs. But what is an NMI? how does operating systems software use these features?

The Arm SystemReady compliance certification program has reached a significant milestone today with the Arm SystemReady LS certification of the Ampere Altra Arm-based Mt. Jade server.

The Arm SystemReady program has reached a significant milestone with over 50 certifications since its launch only two years ago.

This blog introduces the different Arm Total Compute solutions for wearable devices in the XR market, like VR headsets and AR smartglasses.

This blog explores the different CPU performance benchmarks for devices in the home market, including DTVs and set-top boxes (STBs).