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The first few big.little devices are now shipping in volume production, and several new SoCs are coming to market soon that will accelerate the usage of this power and performance optimizing technology in mobile devices. Two of the public platforms employing big.LITTLE technology are the Samsung Exynos 5420 and the Allwinner A80, and a new platform introduced by Mediatek that is sampling in pre-production tablet devices now.
There are nearly a dozen other platforms in various stages of development. While the first big.LITTLE systems have employed an equal number of big and LITTLE cores, up to the maximum of eight, newer big.LITTLE systems will soon be deployed with varying numbers of big and LITTLE ARM Processors, tailored to specific segments within the mobile market.
In parallel with all of this hardware innovation, ARM software engineers have been enhancing big.LITTLE software even further. As mentioned in earlier blogs, the global task scheduling software that enables asymmetric topologies, with different numbers of big and LITTLE cores, is now being deployed in production devices.
See the top 10 things to know blog for more details - Ten Things to Know About big.LITTLE
Now that ARM software engineers have access to multiple silicon vendor platforms, the work has shifted from getting the software working to optimizing system tuning for a broad range of mobile use cases, finding ways to extract even more performance improvements and power savings from the technology. The current results are extremely promising, and future development is expected to unlock even further benefits of big.LITTLE making it an increasingly important mobile SoC technology.
For a background on big.LITTLE it might be useful to start with a few other blog entries on the topic:
big.LITTLE in 64-bit
Combining large and small compute engines - ARM Cortex-A7
Also, a recent Google Hangout goes into a discussion of the key technical aspects of the technology:
To give an update on big.LITTLE technology, I’d like to introduce 3 key cases of big.LITTLE operation, and provide detailed use case CPU activity data and power savings metrics for use cases that illustrate those cases. I will roll out these updates over the course of a few weeks in 3 separate blog posts on each of the key types of use case outlined below:
There are three categories of run-time behavior that are particularly interesting for exploring the benefits and optimization potential of big.LITTLE:
In the high intensity cases, big.LITTLE software is particularly well suited for responding to the bursts of peak performance as well as the troughs of lower required performance. Performance peaks can be allocated to Cortex-A15 class “big” CPUs, and the troughs can be addressed with Cortex-A7 class “LITTLE” CPUs. Because of the hardware cache coherency and the architecture of the global task scheduling software, work can be migrated very quickly to big processors, and high performance threads are identified by their load history and automatically started on big processors when they run. In these cases, the effectiveness of the software is determined by ability to react quickly to peak performance requirements (so as not to slow things down relative to a big core only system) and in the ability to effectively use LITTLE cores with big cores shut down during the troughs to save power.
In the sustained performance cases, the benefits of big.LITTLE are just becoming evident as real systems reach the market and are tuned to real-world workloads. One example here is mobile gaming: in mobile games, the graphics processor is operating at near peak capacity for much of the time, potentially consuming 80% of the SoC power budget. In a constrained thermal envelope, a reduced power budget for the CPU subsystem – big.LITTLE enables an important reduction in power for these use cases than allow the GPU to run faster and deliver a better mobile gaming experience under the same SoC power budget. It is also possible for big.LITTLE to enable a more optimal mix of compute resource for a significantly constrained power and thermal budget. Libraries are in development to exploit the optimal balance of thermal capacity between CPU and GPU – this paper will highlight two use cases that are already exhibiting improved performance through big.LITTLE power savings at the CPU subsystem level.
In the low intensity cases, big.LITTLE has the most obvious benefits, as these workloads can run entirely on LITTLE processors at lower operating voltages. In these cases, the effectiveness of the software is determined by ability to remain running on the LITTLE processors without waking up the big cores.
I will be publishing 3 subsequent blogs in the coming weeks describing the measurements from each of these three categories of operation. In the meantime, you can see the slides I presented on this topic at techcon2013 at the following link: big.LITTLE technology moves towards fully heterogeneous Global Task Scheduling - Techcon Presentation
Thanks for the teaser for the upcoming blogs with more details on the use cases.
Samsung Electronics Allwinner