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Freescale’s Layerscape LS2 SoCs fuel the adoption of SDN and NFV

Eoin McCann
Eoin McCann
November 18, 2014
3 minute read time.

Freescale Semiconductor, a global leader in embedded processing solutions, has released two Layerscape architecture (LS) SoCs based on the ARMv8 64-bit architecture that Freescale describes as “delivering unprecedented performance and integration for the smarter, more capable networks of tomorrow”.

The QorIQ LS2045A and LS2085A multicore processors combine four and eight ARM® Cortex®-A57 cores respectively to improve upon the capabilities of the previous-generation processors, the LS1 family. The LS1 processors featured dual ARM Cortex-A7 cores and an ARM CoreLink™ CCI-400 Cache Coherent Interconnect and were positioned at the value-performance end of the spectrum whereas the LS2 processors have positioned the ARM-based SoCs in a higher performance bracket.

QorIQ LS1021A.png

Freescale's LS1021A processor fact sheet

They are designed with the advanced, high-performance dataplane and network peripheral interfaces required for networking, telecom/datacom, wireless infrastructure, military and aerospace applications. These SoCs are based on ARM's 64-bit architecture, built on Freescale's Layerscape platform and feature a new datapath that is capable of 40Gbps complex packet processing. The chips address not only the rise of software-defined networks (SDNs) and network-functions virtualization (NFV), but also the growing Internet of things (IoT) and the upcoming 5G networks. Specifically, the LS2 chips contain a new packet-processing engine and a set of libraries that enable abstracted programming using standard Linux objects. These libraries foster simple programming models and a faster time to market according to this report from Linley Group. The ability to program the CPU and acceleration engines positions the LS2 for SDN and NFV.

New technologies such as SDN and NFV offer the promise of networks that are more programmable, agile and automated by putting much of the network intelligence now found in the hardware into software, as explained in this article. These approaches are a hot topic at the moment due to the irreversible shift to mobile computing by end users which has caused problems for the static, client-server based network architectures previously in place.  While these software approaches are highly beneficial, it is just as important to have hardware that is optimized for these new models. The QorIQ LS series of chips use the ARM CoreLink CCN-504 Cache Coherent Network as an interconnect solution to maintain full coherency across processor hubs resulting in optimum performance. Its L3 cache reduces latency which in turn reduces the power requirements of the SoC, an important consideration in network applications.

QorIQ LS2085A.png

Freescale's LS2 family fact sheet

ARMv8-A architecture introduced a new exception model with four Exception Levels (EL0-lowest to EL3-highest) in the AArch64 mode. This exception model is key to supporting hardware assisted virtualization and security, which are very important hardware features for server software stacks. Additionally, not only can the ARMv8-based Cortex-A57 processor can address large pools of memory, it has been designed from the ground up to provide the optimal balance of performance and power efficiency to address the broad spectrum of data plane and control plan applications key to SDN Optimization.

neilparris points out in his blog “Heterogeneous Compute Requirements in Network Infrastructure” that NFV helps providers to deal with increased performance requirements by simplifying the management of the large number endpoints, thereby reducing costs. Along with the complete Layerscape architecture, the flexibility of the ARM CoreLink System MMU-500 Memory Management Unit, which maps virtual addresses to physical ones, enables the virtualization that makes the network more agile and serviceable.

The QorIQ LS2085A and LS2045A both have integrated DDR4 DRAM and the latest I/O interfaces to provide compelling offerings for networking and communication designs, particularly for SDN and NFV applications. In addition, the autonomous data plane makes it efficient for packet processing. This combination balances ease-of-use with high performance processing in a Linux® environment that is familiar to any software programmer. Users can fully exploit the underlying hardware and easily adapt to network changes for real-time ‘soft’ control over the network.

For more information: QorIQ LS2045A and LS2085A Processors

 
Anonymous
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