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Fixed arbitration & broken BURST

Hello,

in AMBA Design Kit Technical Reference Manual it says:

A burst transfer can be broken up if a higher-priority master requests the same slave, except where the burst transfer is a locked transfer.

How should it look on the slave side?

In the middle of fixed length burst, instead of SEQ transfer, a new one starts with NONSEQ? And how the original burst continues afterwards?

Thanks

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  • To the slave it will look exactly as you described, a NONSEQ (or IDLE) transfer appearing when a SEQ (or BUSY) was expected.

    Note that defined length bursts cannot be broken by a master, unless either the master receives a non-OKAY response (ERROR, SPLIT or RETRY), or that master loses grant of the bus. For AHB-lite or AHB5 this is simply if the master receives an ERROR response as all these other events are AHB2 features.

    What this text you have quoted is referring to is where an interconnect or BusMatrix has internally decided to switch to a new master source, part way through a defined length burst from one master. As far as that original master is concerned it won't be aware of this switch, so all it will see is wait states to stall that burst, while the interconnect allows another master access to the shared slave.

    So as the interconnect logic has decided to break the original defined length burst, when the interconnect eventually reselects that original master to allow it to complete its remaining transfers, the interconnect logic must ensure that the transfers the slave sees are AHB compliant, so the interconnect needs to start this "new" burst off with a NONSEQ access, and the interconnect will need to override HBURST with a suitable burst type to denote the transfers remaining, this HBURST type usually being INCR for simplicity.

    And note that if you ARE using the AMBA Design Kit BusMatrix component, it has three arbitration options available for selection, with BURST and ROUND not breaking defined length bursts, leaving only the simplest FIXED option which can break these bursts.

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  • To the slave it will look exactly as you described, a NONSEQ (or IDLE) transfer appearing when a SEQ (or BUSY) was expected.

    Note that defined length bursts cannot be broken by a master, unless either the master receives a non-OKAY response (ERROR, SPLIT or RETRY), or that master loses grant of the bus. For AHB-lite or AHB5 this is simply if the master receives an ERROR response as all these other events are AHB2 features.

    What this text you have quoted is referring to is where an interconnect or BusMatrix has internally decided to switch to a new master source, part way through a defined length burst from one master. As far as that original master is concerned it won't be aware of this switch, so all it will see is wait states to stall that burst, while the interconnect allows another master access to the shared slave.

    So as the interconnect logic has decided to break the original defined length burst, when the interconnect eventually reselects that original master to allow it to complete its remaining transfers, the interconnect logic must ensure that the transfers the slave sees are AHB compliant, so the interconnect needs to start this "new" burst off with a NONSEQ access, and the interconnect will need to override HBURST with a suitable burst type to denote the transfers remaining, this HBURST type usually being INCR for simplicity.

    And note that if you ARE using the AMBA Design Kit BusMatrix component, it has three arbitration options available for selection, with BURST and ROUND not breaking defined length bursts, leaving only the simplest FIXED option which can break these bursts.

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