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Supported Rainier PMU events?

Hello,

I am wondering if there are CPU/platform specific PMU events for Rainier CPU? Section 2.17 in the Morello architecture manual defines 0x200-0x238, while C2.3 in the Neoverse N1 manual defines events from 0x0-0xA0. Are the Neoverse N1 events the same for Rainier?

Regards,

Hesham

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