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I want to set GPIO port as output push-pull. CNF bits have to bit set, the datasheet of my MM32F003 says that we have 4 options: In output mode (MODE > 00):
00: General-purpose output push-pull01: General-purpose output Open-drain10: Alternate functionsoutput push-pull11: Alternate functionsoutput Open-drain
How do I set it when in the header files only three options are defined? . For me there should be four definition why only three??
Which should I choose for CNF=00 after reset it is 01.
www.mindmotion.com.cn/.../UM_MM32F003_q_EN.pdf
#define GPIO_CRL_CNF ((uint32_t)0xCCCCCCCC) /*!< Port x configuration bits */ #define GPIO_CRL_CNF0 ((uint32_t)0x0000000C) /*!< CNF0[1:0] bits (Port x configuration bits, pin 0) */ #define GPIO_CRL_CNF0_0 ((uint32_t)0x00000004) /*!< Bit 0 */ #define GPIO_CRL_CNF0_1 ((uint32_t)0x00000008) /*!< Bit 1 */ #define GPIO_CRL_CNF1 ((uint32_t)0x000000C0) /*!< CNF1[1:0] bits (Port x configuration bits, pin 1) */ #define GPIO_CRL_CNF1_0 ((uint32_t)0x00000040) /*!< Bit 0 */ #define GPIO_CRL_CNF1_1 ((uint32_t)0x00000080) /*!< Bit 1 */ #define GPIO_CRL_CNF2 ((uint32_t)0x00000C00) /*!< CNF2[1:0] bits (Port x configuration bits, pin 2) */ #define GPIO_CRL_CNF2_0 ((uint32_t)0x00000400) /*!< Bit 0 */ #define GPIO_CRL_CNF2_1 ((uint32_t)0x00000800) /*!< Bit 1 */ #define GPIO_CRL_CNF3 ((uint32_t)0x0000C000) /*!< CNF3[1:0] bits (Port x configuration bits, pin 3) */ #define GPIO_CRL_CNF3_0 ((uint32_t)0x00004000) /*!< Bit 0 */ #define GPIO_CRL_CNF3_1 ((uint32_t)0x00008000) /*!< Bit 1 */ and so far for other
John Kielbasa said:For me there should be four definition why only three??
Even with 4 definitions, you could not clear bits without a logic AND operator. How about:
GPIOx_CRL &= ~GPIO_CRL_CNF0;
If you see a way to improve the definitions, please contact Mindmotion, because they are maintaining this Device Family Pack (DFP).
Thanks, I am newbie with ARM. I did it so, in similar way
GPIOA->CRL &= ~((1U << 18) | (1U << 19));
Yes, which is identical to:
GPIOA->CRL &= ~GPIO_CRL_CNF4;