Writing the Program in both Flash bank A and Flash bank B in LPC43S57

; *************************************************************
; *** Scatter-Loading Description File generated by uVision ***
; *************************************************************

LR_IROM1 0x1A030000 0x00050000  ; load region size of region
{
  ER_IROM1 0x1A030000 0x00050000  ; execution address and size    Flash Bank A
  {
	*(InRoot$$Sections)
	*.o (RESET, +First)
    *(.init_array)
	.ANY (+RO)
  }
 
  RW_IRAM1 0x10000000 0x00008000  ; RW data bytes   32KB Local SRAM
  {
   .ANY (+RW +ZI)
  }
  
  RW_IRAM2 0x10080000 0x00009FE0  ; RW data bytes    32KB + 8KB -32Bytes Local SRAM
  {
   *(STACK)
  }
  
  RW_IRAM3 0x10089FE0 FILL 0xAAAAAAAA 0x00000020 ; RW data This section 32Bytes is reserved for IAP 
  {  
  }

  RW_IRAM4 0x20000000 0x00010000  ; RW data bytes  4 x 16 kB AHB SRAM
  {
   .ANY (+RW +ZI)
  }

  RW_RAM1 0x28000000 0x800000  ; RW data, slower performing  SDRAM 8MB
  { 
	*(HEAP)
	.ANY (+RW +ZI)
  }
}

LR_IROM2 0x1B010000 0x00040000 
{
   ER_IROM2 0x1B010000 0x00040000  ; execution address and size    Flash Bank A
  {
	.ANY (+RO)
  }
}