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Usb failed packets

Hello,

What could be causing failed packets


Connection Status Device connected
Current Configuration 1
Speed Full
Device Address 1
Number Of Open Pipes 0

Device Descriptor NXP LPC17xx Speaker
Offset Field Size Value Description
0 bLength 1 12h
1 bDescriptorType 1 01h Device
2 bcdUSB 2 0200h USB Spec 2.0
4 bDeviceClass 1 00h Class info in Ifc Descriptors
5 bDeviceSubClass 1 00h
6 bDeviceProtocol 1 00h
7 bMaxPacketSize0 1 40h 64 bytes
8 idVendor 2 1FC7h
10 idProduct 2 4005h
12 bcdDevice 2 0100h 1.00
14 iManufacturer 1 01h "NXP Semicond "
15 iProduct 1 02h "NXP LPC17xx Speaker "
16 iSerialNumber 1 03h "DEMO00000000"
17 bNumConfigurations 1 01h

Configuration Descriptor 1 Bus Powered, 100 mA
Offset Field Size Value Description
0 bLength 1 09h
1 bDescriptorType 1 02h Configuration
2 wTotalLength 2 0076h
4 bNumInterfaces 1 02h
5 bConfigurationValue 1 01h
6 iConfiguration 1 00h
7 bmAttributes 1 80h Bus Powered
 4..0: Reserved  ...00000
 5: Remote Wakeup  ..0.....  No
 6: Self Powered  .0......  No, Bus Powered
 7: Reserved (set to one)
(bus-powered for 1.0)  1.......
8 bMaxPower 1 32h 100 mA

Interface Descriptor 0/0 Audio, 0 Endpoints
Offset Field Size Value Description
0 bLength 1 09h
1 bDescriptorType 1 04h Interface
2 bInterfaceNumber 1 00h
3 bAlternateSetting 1 00h
4 bNumEndpoints 1 00h
5 bInterfaceClass 1 01h Audio
6 bInterfaceSubClass 1 01h Audio Control
7 bInterfaceProtocol 1 00h
8 iInterface 1 00h

Audio Control Interface Header Descriptor
Offset Field Size Value Description
0 bLength 1 09h
1 bDescriptorType 1 24h Audio Control Interface Header
2  7 01 00 01 27 00 01 01

Audio Control Input Terminal Descriptor
Offset Field Size Value Description
0 bLength 1 0Ch
1 bDescriptorType 1 24h Audio Control Input Terminal
2  10 02 01 01 01 00 01 00 00
00 00

Audio Control Feature Unit Descriptor
Offset Field Size Value Description
0 bLength 1 09h
1 bDescriptorType 1 24h Audio Control Feature Unit
2  7 06 02 01 01 03 00 00

Audio Control Output Terminal Descriptor
Offset Field Size Value Description
0 bLength 1 09h
1 bDescriptorType 1 24h Audio Control Output Terminal
2  7 03 03 01 03 00 02 00

Interface Descriptor 1/0 Audio, 0 Endpoints
Offset Field Size Value Description
0 bLength 1 09h
1 bDescriptorType 1 04h Interface
2 bInterfaceNumber 1 01h
3 bAlternateSetting 1 00h
4 bNumEndpoints 1 00h
5 bInterfaceClass 1 01h Audio
6 bInterfaceSubClass 1 02h Audio Streaming
7 bInterfaceProtocol 1 00h
8 iInterface 1 00h

Interface Descriptor 1/1 Audio, 2 Endpoints
Offset Field Size Value Description
0 bLength 1 09h
1 bDescriptorType 1 04h Interface
2 bInterfaceNumber 1 01h
3 bAlternateSetting 1 01h
4 bNumEndpoints 1 02h
5 bInterfaceClass 1 01h Audio
6 bInterfaceSubClass 1 02h Audio Streaming
7 bInterfaceProtocol 1 00h
8 iInterface 1 00h

Audio Streaming Interface Descriptor
Offset Field Size Value Description
0 bLength 1 07h
1 bDescriptorType 1 24h Audio Streaming Interface
2  5 01 01 01 01 00

Audio Streaming Format Type Descriptor
Offset Field Size Value Description
0 bLength 1 0Bh
1 bDescriptorType 1 24h Audio Streaming Format Type
2  9 02 01 01 02 10 01 40 1F
00

Endpoint Descriptor 03 3 Out, Isochronous, 1 ms
Offset Field Size Value Description
0 bLength 1 09h
1 bDescriptorType 1 05h Endpoint
2 bEndpointAddress 1 03h 3 Out
3 bmAttributes 1 05h Isochronous, Asynchronous, Data
 1..0: Transfer Type  ......01  Isochronous
 3..2: Sync Type  ....01..  Asynchronous
 5..4: Usage Type  ..00....  Data
 7..6: Reserved  00......
4 wMaxPacketSize 2 0012h 18 bytes
6 bInterval 1 01h 1 ms
7 bRefresh 1 00h
8 bSynchAddress 1 83h

Audio Streaming Isochronous Audio Data Endpoint Descriptor
Offset Field Size Value Description
0 bLength 1 07h
1 bDescriptorType 1 25h Audio Streaming Isochronous Audio Data Endpoint
2  5 01 00 02 00 00

Endpoint Descriptor 83 3 In, Isochronous, 1 ms
Offset Field Size Value Description
0 bLength 1 09h
1 bDescriptorType 1 05h Endpoint
2 bEndpointAddress 1 83h 3 In
3 bmAttributes 1 01h Isochronous, No Sync, Data
 1..0: Transfer Type  ......01  Isochronous
 3..2: Sync Type  ....00..  No Sync
 5..4: Usage Type  ..00....  Data
 7..6: Reserved  00......
4 wMaxPacketSize 2 0003h 3 bytes
6 bInterval 1 01h 1 ms
7 bRefresh 1 01h
8 bSynchAddress 1 00h

http://pastebin.com/gbdKGnwQ


URB     0006-0003       4:11:41.526     6.746 ms        71 us   Sync Reset Pipe and Clear Stall                         01:01:83        83DEC6F0h       USBPDO-5        usbhub  84E65E00h       Success (Success)
URB     0007-0002       4:11:41.526     6.749 ms        88 us   Sync Reset Pipe and Clear Stall                         01:01:83        83DC8C80h       0000007a        usbccgp 84E65E00h       Success (Success)
URB     0008    4:11:41.526     6.758 ms                Isoch Transfer  3 bytes buffer          in      01:01:83        83DC8C80h       0000007a        usbccgp 84FD5790h
URB     0009    4:11:41.526     6.763 ms                Isoch Transfer  3 bytes buffer          in      01:01:83        83DEC6F0h       USBPDO-5        usbhub  84FD5790h
URB     0010-0009       4:11:41.526     6.831 ms        69 us   Isoch Transfer                  in      01:01:83        83DEC6F0h       USBPDO-5        usbhub  84FD5790h       Unsuccessful (Internal HC Error)
URB     0011-0008       4:11:41.526     6.834 ms        77 us   Isoch Transfer                  in      01:01:83        83DC8C80h       0000007a        usbccgp 84FD5790h       Unsuccessful (Internal HC Error)
URB     0012    4:11:41.526     6.847 ms                Sync Reset Pipe and Clear Stall                         01:01:83        83DC8C80h       0000007a        usbccgp 83DD4008h
URB     0013    4:11:41.526     6.853 ms                Sync Reset Pipe and Clear Stall                         01:01:83        83DEC6F0h       USBPDO-5        usbhub  83DD4008h
URB     0014-0013       4:11:41.526     6.889 ms        36 us   Sync Reset Pipe and Clear Stall                         01:01:83        83DEC6F0h       USBPDO-5        usbhub  83DD4008h       Success (Success)
URB     0015-0012       4:11:41.526     6.892 ms        45 us   Sync Reset Pipe and Clear Stall                         01:01:83        83DC8C80h       0000007a        usbccgp 83DD4008h       Success (Success)



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  • Hello,

    I have tried to make changes to the examples

    usbuser.c

    
    /*
     *  USB Start of Frame Event Callback
     *   Called automatically on USB Start of Frame Event
     */
    uint32_t last_timer_count;
    
    #if USB_SOF_EVENT
    void USB_SOF_Event (void) {
    uint32_t current_timer_count;
      uint32_t feedback_value;
      uint32_t pclk;
                                                    // feedback
      current_timer_count = LPC_TIM1->TCR;                   // capture current SOF timing on the Timer1
      if ( USB_AltSetting[1] == 1 ) {               // When interface 1 / alt 1 is enabled,
                                                    // calculate master/SOF frequency ratio in 10.10 (10.14) format
        feedback_value = ((current_timer_count - last_timer_count) << 14) / (pclk/DATA_FREQ);
                                                    // and send it to the feedback IN EP
        USB_WriteEP( 0x83, (uint8_t *)&feedback_value, 1 );
      }
      last_timer_count = current_timer_count;       // update the last SOF timing
    #if USB_DMA == 0
      if (USB_ReadEP(0x03, (BYTE *)&DataBuf[DataIn])) {
        /* Data Available */
        DataIn += P_S;                          /* Update Data In Index */
        DataIn &= B_S - 1;                      /* Adjust Data In Index */
        if (((DataIn - DataOut) & (B_S - 1)) == (B_S/2)) {
          DataRun = 1;                          /* Data Stream running */
        }
      } else {
        /* No Data */
        DataRun  = 0;                           /* Data Stream not running */
        DataOut  = DataIn;                      /* Initialize Data Indexes */
      }
    #endif
    }
    #endif
    
    

    usbcfg.h

    #define USB_DMA_EP          0x000000C0
    
    LPC_USB->USBEpDMAEn   = USB_DMA_EP;
    

    I think the problems is the usbuser.c file , I really don't have a clue of how I am to write the in endpoint event of the code and to the USBDMARSet register, I have bolded the part of the code to help you understand more. Could you please help me finish the code.

    /*
     *  USB Start of Frame Event Callback
     *   Called automatically on USB Start of Frame Event
     */
    uint32_t last_timer_count;
    
    #if USB_SOF_EVENT
    void USB_SOF_Event (void) {
    uint32_t current_timer_count;
      uint32_t feedback_value;
      uint32_t pclk;
                                                    // feedback
      current_timer_count = LPC_TIM1->TCR;                   // capture current SOF timing on the Timer1
      if ( USB_AltSetting[1] == 1 ) {               // When interface 1 / alt 1 is enabled,
                                                    // calculate master/SOF frequency ratio in 10.10 (10.14) format
        feedback_value = ((current_timer_count - last_timer_count) << 14) / (pclk/DATA_FREQ);
                                                    // and send it to the feedback IN EP
        USB_WriteEP( 0x83, (uint8_t *)&feedback_value, 1 );
      }
      last_timer_count = current_timer_count;       // update the last SOF timing
    #if USB_DMA == 0
      if (USB_ReadEP(0x03, (BYTE *)&DataBuf[DataIn])) {
        /* Data Available */
        DataIn += P_S;                          /* Update Data In Index */
        DataIn &= B_S - 1;                      /* Adjust Data In Index */
        if (((DataIn - DataOut) & (B_S - 1)) == (B_S/2)) {
          DataRun = 1;                          /* Data Stream running */
        }
      } else {
        /* No Data */
        DataRun  = 0;                           /* Data Stream not running */
        DataOut  = DataIn;                      /* Initialize Data Indexes */
      }
    #endif
    }
    #endif
    
    
    
    
    
    void USB_EndPoint3 (uint32_t event) {
    #if USB_DMA
      USB_DMA_DESCRIPTOR DD;
    
      if (event & USB_EVT_OUT_DMA_EOT) {
        /* End of Transfer */
        if (USB_DMA_BufAdr(0x03) != ((uint32_t)DataBuf + 2*DataIn)) {
          /* Data Available */
          DataIn += P_C*P_S;                    /* Update Data In Index */
          DataIn &= B_S - 1;                    /* Adjust Data In Index */
          if (((DataIn - DataOut) & (B_S - 1)) == (B_S/2)) {
            DataRun = 1;                        /* Data Stream running */
          }
        } else {
          /* No Data */
          DataRun = 0;                          /* Data Stream not running */
          DataOut = DataIn;                     /* Initialize Data Indexes */
        }
      }
      if (event & (USB_EVT_OUT_DMA_EOT) | (USB_EVT_OUT_DMA_NDR)) {
        /* End of Transfer or New Descriptor Request */
        DD.BufAdr  = (uint32_t)DataBuf + 2*DataIn; /* DMA Buffer Address */
        DD.BufLen  = P_C;                       /* DMA Packet Count */
        DD.MaxSize = 0;                         /* Must be 0 for Iso Transfer */
        DD.InfoAdr = (uint32_t)InfoBuf;            /* Packet Info Buffer Address */
        DD.Cfg.Val = 0;                         /* Initial DMA Configuration */
        DD.Cfg.Type.IsoEP = 1;                  /* Iso Endpoint */
        USB_DMA_Setup (0x03, &DD);              /* Setup DMA */
        USB_DMA_Enable(0x03);                   /* Enable DMA */
      }
    #else
      event = event;
    #endif
    }
    
    
    

Children
  • For confirmation,
    - You are working on LPC17xx
    - Your code is based on USBAudio example in this Sample Code Bundle
    MCB1700 Sample Code Bundle for LPC17xx Peripherals using Keil's MDK-ARM V2.00 (Jan 10, 2011)
    ics.nxp.com/.../mcb1700.code.bundle.lpc17xx.keil.zip

    Is it correct?



    You seem to take your code from this topic,

    usb asynchronous
    http://www.keil.com/forum/19557/

    Your code passes 1 byte to the isoc IN endpoint.
    It should be 3 bytes, as the original does.

    void USB_SOF_Event (void) {
        ...
        USB_WriteEP( 0x83, (uint8_t *)&feedback_value, 1 ); //<--- 3
    

    > I really don't have a clue of how I am to write the in endpoint event of the code and to the USBDMARSet register

    The isoc feedback IN endpoint is filled in above USB_SOF_Event().
    You don't need to touch to this endpoint in USB_EndPoint3(), at all.

    Tsuneo

  • Yes this correct

    Yes I am very sorry, I was trying to slove the problem and forget to put it back to it's orginal self, that is why it is 1 instead of 3, I thought maybe that, that value 3 could be why I was losing packets

    Here is the usbcfg.h file, I can not add LPC_USB->USBEpDMAEn = USB_DMA_EP; into the cfg file with out getting errors

    /*----------------------------------------------------------------------------
     *      U S B  -  K e r n e l
     *----------------------------------------------------------------------------
     * Name:    usbcfg.h
     * Purpose: USB Custom Configuration
     * Version: V1.20
     *----------------------------------------------------------------------------
     *      This software is supplied "AS IS" without any warranties, express,
     *      implied or statutory, including but not limited to the implied
     *      warranties of fitness for purpose, satisfactory quality and
     *      noninfringement. Keil extends you a royalty-free right to reproduce
     *      and distribute executable files created using this software for use
     *      on NXP Semiconductors LPC family microcontroller devices only. Nothing
     *      else gives you the right to use this software.
     *
     * Copyright (c) 2009 Keil - An ARM Company. All rights reserved.
     *----------------------------------------------------------------------------
     * History:
     *          V1.20 Added vendor specific support
     *          V1.00 Initial Version
     *----------------------------------------------------------------------------*/
    
    #ifndef __USBCFG_H__
    #define __USBCFG_H__
    
    
    //*** <<< Use Configuration Wizard in Context Menu >>> ***
    
    
    /*
    // <h> USB Configuration
    //   <o0> USB Power
    //         Default Power Setting
    //        <0=> Bus-powered
    //        <1=> Self-powered
    //   <o1> Max Number of Interfaces <1-256>
    //   <o2> Max Number of Endpoints  <1-32>
    //   <o3> Max Endpoint 0 Packet Size
    //        <8=> 8 Bytes <16=> 16 Bytes <32=> 32 Bytes <64=> 64 Bytes
    //   <e4> DMA Transfer
    //      Use DMA for selected Endpoints
    //     <o5.0>  Endpoint 0 Out
    //     <o5.1>  Endpoint 0 In
    //     <o5.2>  Endpoint 1 Out
    //     <o5.3>  Endpoint 1 In
    //     <o5.4>  Endpoint 2 Out
    //     <o5.5>  Endpoint 2 In
    //     <o5.6>  Endpoint 3 Out
    //     <o5.7>  Endpoint 3 In
    //     <o5.8>  Endpoint 4 Out
    //     <o5.9>  Endpoint 4 In
    //     <o5.10> Endpoint 5 Out
    //     <o5.11> Endpoint 5 In
    //     <o5.12> Endpoint 6 Out
    //     <o5.13> Endpoint 6 In
    //     <o5.14> Endpoint 7 Out
    //     <o5.15> Endpoint 7 In
    //     <o5.16> Endpoint 8 Out
    //     <o5.17> Endpoint 8 In
    //     <o5.18> Endpoint 9 Out
    //     <o5.19> Endpoint 9 In
    //     <o5.20> Endpoint 10 Out
    //     <o5.21> Endpoint 10 In
    //     <o5.22> Endpoint 11 Out
    //     <o5.23> Endpoint 11 In
    //     <o5.24> Endpoint 12 Out
    //     <o5.25> Endpoint 12 In
    //     <o5.26> Endpoint 13 Out
    //     <o5.27> Endpoint 13 In
    //     <o5.28> Endpoint 14 Out
    //     <o5.29> Endpoint 14 In
    //     <o5.30> Endpoint 15 Out
    //     <o5.31> Endpoint 15 In
    //   </e>
    // </h>
    */
    
    #define USB_POWER           0
    #define USB_IF_NUM          4
    #define USB_EP_NUM          32
    #define USB_MAX_PACKET0     64
    #define USB_DMA             1
    #define USB_DMA_EP          0x000000C0
    
    //LPC_USB->USBEpDMAEn   = USB_DMA_EP;
    
    
    /*
    // <h> USB Event Handlers
    //   <h> Device Events
    //     <o0.0> Power Event
    //     <o1.0> Reset Event
    //     <o2.0> Suspend Event
    //     <o3.0> Resume Event
    //     <o4.0> Remote Wakeup Event
    //     <o5.0> Start of Frame Event
    //     <o6.0> Error Event
    //   </h>
    //   <h> Endpoint Events
    //     <o7.0>  Endpoint 0 Event
    //     <o7.1>  Endpoint 1 Event
    //     <o7.2>  Endpoint 2 Event
    //     <o7.3>  Endpoint 3 Event
    //     <o7.4>  Endpoint 4 Event
    //     <o7.5>  Endpoint 5 Event
    //     <o7.6>  Endpoint 6 Event
    //     <o7.7>  Endpoint 7 Event
    //     <o7.8>  Endpoint 8 Event
    //     <o7.9>  Endpoint 9 Event
    //     <o7.10> Endpoint 10 Event
    //     <o7.11> Endpoint 11 Event
    //     <o7.12> Endpoint 12 Event
    //     <o7.13> Endpoint 13 Event
    //     <o7.14> Endpoint 14 Event
    //     <o7.15> Endpoint 15 Event
    //   </h>
    //   <h> USB Core Events
    //     <o8.0>  Set Configuration Event
    //     <o9.0>  Set Interface Event
    //     <o10.0> Set/Clear Feature Event
    //   </h>
    // </h>
    */
    
    #define USB_POWER_EVENT     0
    #define USB_RESET_EVENT     1
    #define USB_SUSPEND_EVENT   0
    #define USB_RESUME_EVENT    0
    #define USB_WAKEUP_EVENT    0
    #define USB_SOF_EVENT       1
    #define USB_ERROR_EVENT     0
    #define USB_EP_EVENT        0x0009
    #define USB_CONFIGURE_EVENT 0
    #define USB_INTERFACE_EVENT 0
    #define USB_FEATURE_EVENT   0
    
    
    /*
    // <e0> USB Class Support
    //    enables USB Class specific Requests
    //   <e1> Human Interface Device (HID)
    //     <o2> Interface Number <0-255>
    //   </e>
    //   <e3> Mass Storage
    //     <o4> Interface Number <0-255>
    //   </e>
    //   <e5> Audio Device
    //     <o6> Control Interface Number <0-255>
    //     <o7> Streaming Interface 1 Number <0-255>
    //     <o8> Streaming Interface 2 Number <0-255>
    //   </e>
    //   <e9> Communication Device
    //     <o10> Control Interface Number <0-255>
    //     <o11> Bulk Interface Number <0-255>
    //     <o12> Max Communication Device Buffer Size
    //        <8=> 8 Bytes <16=> 16 Bytes <32=> 32 Bytes <64=> 64 Bytes
    //   </e>
    // </e>
    */
    
    #define USB_CLASS           1
    #define USB_HID             0
    #define USB_HID_IF_NUM      0
    #define USB_MSC             0
    #define USB_MSC_IF_NUM      0
    #define USB_AUDIO           1
    #define USB_ADC_CIF_NUM     0
    #define USB_ADC_SIF1_NUM    1
    #define USB_ADC_SIF2_NUM    2
    #define USB_CDC                         0
    #define USB_CDC_CIF_NUM     0
    #define USB_CDC_DIF_NUM     1
    #define USB_CDC_BUFSIZE     64
    
    /*
    // <e0> USB Vendor Support
    //    enables USB Vendor specific Requests
    // </e>
    */
    #define USB_VENDOR          0
    
    
    #endif  /* __USBCFG_H__ */
    

  • If you could please help me slove this that would be great, I thought perhaps In endpoints needed to be added but I guess not, then I thought that LPC_USB->USBEpDMAEn = USB_DMA_EP; needed to be added into the cfg file but I can not do this with out errors

    I see LPC_USB->USBEpDMAEn = USB_DMA_EP; is in the usbhw.c file

    void USB_Reset (void) {
    #if USB_DMA
      uint32_t n;
    #endif
    
      LPC_USB->USBEpInd = 0;
      LPC_USB->USBMaxPSize = USB_MAX_PACKET0;
      LPC_USB->USBEpInd = 1;
      LPC_USB->USBMaxPSize = USB_MAX_PACKET0;
      while ((LPC_USB->USBDevIntSt & EP_RLZED_INT) == 0);
    
      LPC_USB->USBEpIntClr  = 0xFFFFFFFF;
      LPC_USB->USBEpIntEn   = 0xFFFFFFFF ^ USB_DMA_EP;
      LPC_USB->USBDevIntClr = 0xFFFFFFFF;
      LPC_USB->USBDevIntEn  = DEV_STAT_INT    | EP_SLOW_INT    |
                   (USB_SOF_EVENT   ? FRAME_INT : 0) |
                   (USB_ERROR_EVENT ? ERR_INT   : 0);
    
    #if USB_DMA
      LPC_USB->USBUDCAH   = USB_RAM_ADR;
      LPC_USB->USBDMARClr = 0xFFFFFFFF;
      LPC_USB->USBEpDMADis  = 0xFFFFFFFF;
      LPC_USB->USBEpDMAEn   = USB_DMA_EP;
      LPC_USB->USBEoTIntClr = 0xFFFFFFFF;
      LPC_USB->USBNDDRIntClr = 0xFFFFFFFF;
      LPC_USB->USBSysErrIntClr = 0xFFFFFFFF;
      LPC_USB->USBDMAIntEn  = 0x00000007;
      DDMemMap[0] = 0x00000000;
      DDMemMap[1] = 0x00000000;
      for (n = 0; n < USB_EP_NUM; n++) {
        udca[n] = 0;
        UDCA[n] = 0;
      }
    #endif
    }
    

    Not sure why the lost packets I have not added USBDMARSet in the code anywhere, if you could help slove this that would be great.

  • The firmware handles the isoc IN endpoint (0x83) in "slave mode" (ie. not in DMA mode).
    USB_SOF_Event() processes this endpoint.
    So, don't register this EP at USB_DMA_EP

    usbcfg.h
    #define USB_DMA_EP          0x000000C0 // <--- 0x00000040
    

    Tsuneo

  • Hi,

    I changed

    #define USB_DMA_EP          0x00000040
    
    /*----------------------------------------------------------------------------
     *      U S B  -  K e r n e l
     *----------------------------------------------------------------------------
     * Name:    usbreg.h
     * Purpose: USB Hardware Layer Definitions for NXP LPC Family MCUs
     * Version: V1.20
     *----------------------------------------------------------------------------
     *      This software is supplied "AS IS" without any warranties, express,
     *      implied or statutory, including but not limited to the implied
     *      warranties of fitness for purpose, satisfactory quality and
     *      noninfringement. Keil extends you a royalty-free right to reproduce
     *      and distribute executable files created using this software for use
     *      on NXP Semiconductors LPC family microcontroller devices only. Nothing
     *      else gives you the right to use this software.
     *
     * Copyright (c) 2009 Keil - An ARM Company. All rights reserved.
     *---------------------------------------------------------------------------*/
    
    #ifndef __USBREG_H
    #define __USBREG_H
    
    /* Device Interrupt Bit Definitions */
    #define FRAME_INT           0x00000001
    #define EP_FAST_INT         0x00000002
    #define EP_SLOW_INT         0x00000004
    #define DEV_STAT_INT        0x00000008
    #define CCEMTY_INT          0x00000010
    #define CDFULL_INT          0x00000020
    #define RxENDPKT_INT        0x00000040
    #define TxENDPKT_INT        0x00000080
    #define EP_RLZED_INT        0x00000100
    #define ERR_INT             0x00000200
    
    /* Rx & Tx Packet Length Definitions */
    #define PKT_LNGTH_MASK      0x000003FF
    #define PKT_DV              0x00000400
    #define PKT_RDY             0x00000800
    
    /* USB Control Definitions */
    #define CTRL_RD_EN          0x00000001
    #define CTRL_WR_EN          0x00000002
    
    /* Command Codes */
    #define CMD_SET_ADDR        0x00D00500
    #define CMD_CFG_DEV         0x00D80500
    #define CMD_SET_MODE        0x00F30500
    #define CMD_RD_FRAME        0x00F50500
    #define DAT_RD_FRAME        0x00F50200
    #define CMD_RD_TEST         0x00FD0500
    #define DAT_RD_TEST         0x00FD0200
    #define CMD_SET_DEV_STAT    0x00FE0500
    #define CMD_GET_DEV_STAT    0x00FE0500
    #define DAT_GET_DEV_STAT    0x00FE0200
    #define CMD_GET_ERR_CODE    0x00FF0500
    #define DAT_GET_ERR_CODE    0x00FF0200
    #define CMD_RD_ERR_STAT     0x00FB0500
    #define DAT_RD_ERR_STAT     0x00FB0200
    #define DAT_WR_BYTE(x)     (0x00000100 | ((x) << 16))
    #define CMD_SEL_EP(x)      (0x00000500 | ((x) << 16))
    #define DAT_SEL_EP(x)      (0x00000200 | ((x) << 16))
    #define CMD_SEL_EP_CLRI(x) (0x00400500 | ((x) << 16))
    #define DAT_SEL_EP_CLRI(x) (0x00400200 | ((x) << 16))
    #define CMD_SET_EP_STAT(x) (0x00400500 | ((x) << 16))
    #define CMD_CLR_BUF         0x00F20500
    #define DAT_CLR_BUF         0x00F20200
    #define CMD_VALID_BUF       0x00FA0500
    
    /* Device Address Register Definitions */
    #define DEV_ADDR_MASK       0x7F
    #define DEV_EN              0x80
    
    /* Device Configure Register Definitions */
    #define CONF_DVICE          0x01
    
    /* Device Mode Register Definitions */
    #define AP_CLK              0x01
    #define INAK_CI             0x02
    #define INAK_CO             0x04
    #define INAK_II             0x08
    #define INAK_IO             0x10
    #define INAK_BI             0x20
    #define INAK_BO             0x40
    
    /* Device Status Register Definitions */
    #define DEV_CON             0x01
    #define DEV_CON_CH          0x02
    #define DEV_SUS             0x04
    #define DEV_SUS_CH          0x08
    #define DEV_RST             0x10
    
    /* Error Code Register Definitions */
    #define ERR_EC_MASK         0x0F
    #define ERR_EA              0x10
    
    /* Error Status Register Definitions */
    #define ERR_PID             0x01
    #define ERR_UEPKT           0x02
    #define ERR_DCRC            0x04
    #define ERR_TIMOUT          0x08
    #define ERR_EOP             0x10
    #define ERR_B_OVRN          0x20
    #define ERR_BTSTF           0x40
    #define ERR_TGL             0x80
    
    /* Endpoint Select Register Definitions */
    #define EP_SEL_F            0x01
    #define EP_SEL_ST           0x02
    #define EP_SEL_STP          0x04
    #define EP_SEL_PO           0x08
    #define EP_SEL_EPN          0x10
    #define EP_SEL_B_1_FULL     0x20
    #define EP_SEL_B_2_FULL     0x40
    
    /* Endpoint Status Register Definitions */
    #define EP_STAT_ST          0x01
    #define EP_STAT_DA          0x20
    #define EP_STAT_RF_MO       0x40
    #define EP_STAT_CND_ST      0x80
    
    /* Clear Buffer Register Definitions */
    #define CLR_BUF_PO          0x01
    
    
    /* DMA Interrupt Bit Definitions */
    #define EOT_INT             0x01
    #define NDD_REQ_INT         0x02
    #define SYS_ERR_INT         0x04
    
    
    #endif  /* __USBREG_H */
    

  • usbreg.h

    /* Device Interrupt Bit Definitions */
    #define FRAME_INT           0x00000001
    #define EP_FAST_INT         0x00000002
    #define EP_SLOW_INT         0x00000004
    #define DEV_STAT_INT        0x00000008
    #define CCEMTY_INT          0x00000010
    #define CDFULL_INT          0x00000020
    #define RxENDPKT_INT        0x00000040
    #define TxENDPKT_INT        0x00000080
    #define EP_RLZED_INT        0x00000100
    #define ERR_INT             0x00000200
    
    

    but still no luck, different error

    URB     0080    5:25:45.284     43.540 ms               Sync Reset Pipe and Clear Stall                         01:01:83        86079B80h       0000009a        usbccgp 86F08558h
    URB     0081-0080       5:25:45.284     43.587 ms       46 us   Sync Reset Pipe and Clear Stall                         01:01:83        86079B80h       0000009a        usbccgp 86F08558h       Success (Success)
    URB     0082    5:25:45.284     43.594 ms               Isoch Transfer  3 bytes buffer          in      01:01:83        86079B80h       0000009a        usbccgp 85DA3008h
    URB     0083-0082       5:25:45.286     45.368 ms       1.774 ms        Isoch Transfer                  in      01:01:83        86079B80h       0000009a        usbccgp 85DA3008h       Unsuccessful (Iso Request Failed)
    URB     0084    5:25:45.286     45.410 ms               Sync Reset Pipe and Clear Stall                         01:01:83        86079B80h       0000009a        usbccgp 86F08558h
    URB     0085-0084       5:25:45.286     45.453 ms       43 us   Sync Reset Pipe and Clear Stall                         01:01:83        86079B80h       0000009a        usbccgp 86F08558h       Success (Success)
    URB     0086    5:25:45.286     45.460 ms               Isoch Transfer  3 bytes buffer          in      01:01:83        86079B80h       0000009a        usbccgp 85DA3008h
    URB     0087-0086       5:25:45.288     47.360 ms       1.899 ms        Isoch Transfer                  in      01:01:83        86079B80h       0000009a        usbccgp 85DA3008h       Unsuccessful (Iso Request Failed)
    URB     0088    5:25:45.288     47.407 ms               Sync Reset Pipe and Clear Stall                         01:01:83        86079B80h       0000009a        usbccgp 86F08558h
    URB     0089-0088       5:25:45.288     47.444 ms       37 us   Sync Reset Pipe and Clear Stall                         01:01:83        86079B80h       0000009a        usbccgp 86F08558h       Success (Success)
    URB     0090    5:25:45.288     47.450 ms               Isoch Transfer  3 bytes buffer          in      01:01:83        86079B80h       0000009a        usbccgp 85DA3008h
    URB     0091-0026       5:25:45.289     48.360 ms       35.761 ms       Isoch Transfer  160 bytes buffer                out     01:01:03        86079B80h       0000009a        usbccgp 86F03930h       Success (Success)
    URB     0092-0090       5:25:45.289     49.354 ms       1.904 ms        Isoch Transfer                  in      01:01:83        86079B80h       0000009a        usbccgp 85DA3008h       Unsuccessful (Iso Request Failed)
    URB     0093    5:25:45.290     49.374 ms               Sync Reset Pipe and Clear Stall                         01:01:83        86079B80h       0000009a        usbccgp 86F08558h
    URB     0094-0093       5:25:45.290     49.412 ms       38 us   Sync Reset Pipe and Clear Stall                         01:01:83        86079B80h       0000009a        usbccgp 86F08558h       Success (Success)
    URB     0095    5:25:45.290     49.418 ms               Isoch Transfer  3 bytes buffer          in      01:01:83        86079B80h       0000009a        usbccgp 85DA3008h
    URB     0096-0095       5:25:45.291     50.357 ms       939 us  Isoch Transfer                  in      01:01:83        86079B80h       0000009a        usbccgp 85DA3008h       Unsuccessful (Iso Request Failed)
    URB     0097    5:25:45.291     50.428 ms               Sync Reset Pipe and Clear Stall                         01:01:83        86079B80h       0000009a        usbccgp 86F08558h
    URB     0098-0097       5:25:45.291     50.464 ms       36 us   Sync Reset Pipe and Clear Stall                         01:01:83        86079B80h       0000009a        usbccgp 86F08558h       Success (Success)
    URB     0099    5:25:45.291     50.469 ms               Isoch Transfer  3 bytes buffer          in      01:01:83        86079B80h       0000009a        usbccgp 85DA3008h
    URB     0100-0099       5:25:45.293     52.367 ms       1.897 ms        Isoch Transfer                  in      01:01:83        86079B80h       0000009a        usbccgp 85DA3008h       Unsuccessful (Iso Request Failed)
    URB     0101    5:25:45.293     52.611 ms               Isoch Transfer  160 bytes data  7C F3 E5 F7 A8 F8 81 F1...      out     01:01:03        86079B80h       0000009a        usbccgp 86F03930h
    

    can you please help.

  • I changed

    #define USB_DMA_EP          0x00000040
    

    in the usbcfg.h file

    just in case I confused you by posting the usbreg.h reg file, when searching to find out what was wrong that is where I was taken .

    can you help please.

  • Above sniffer trace is utterly weird.
    - The host repeats isoc IN transaction in short interval, less than 1ms
    - The host puts 160 bytes transaction to the isoc OUT EP, whereas this EP declares just 18 bytes wMaxPacketSize.
    And, the sampling rate on TypeI format is set to 8k

    Maybe, your firmware has troubles in many places.
    You have changed too many portions of the code at a time on the original example.
    - Sampling rate (32k --> 8k)
    - Asynchronous with feedback EP
    Change the firmware one by one, with confirming the change result.
    Apply either one, first.

    Tsuneo

  • You sure I don't have to do anything to the

    USB Endpoint3 Event Callback

  • It works and plays audio at 8000khz But I am losing packets

  • And this is Endpoint 3 in according to the config wizard, what you say to set is endpoint 3 out

    #define USB_DMA_EP          0x00000080
    

  • > It works and plays audio at 8000khz But I am losing packets

    Then, before applying Async, get back to the 8k sampling change, and find the cause of packet loss, first.

    You declare 18 bytes wMaxPacketSize of EP3 OUT on the endpoint descriptor.
    The original example defines P_S (packet size) value on usbaudio.h, as follows.
    How do you change P_S value?

    usbaudio.h
    /* Audio Definitions */
    #define DATA_FREQ 32000                 /* Audio Data Frequency */
    #define P_S       32                    /* Packet Size */
    #if USB_DMA
    #define P_C       4                     /* Packet Count */
    #else
    #define P_C       1                     /* Packet Count */
    #endif
    #define B_S       (8*P_C*P_S)           /* Buffer Size */
    

    The original example assumes P_S value as a number of power of 2, like 2, 4, 8, 16, 32, ...
    If your firmware set P_S to 18, the firmware will show unexpected behavior.

    Tsuneo

  • usbaudio.h
    /* Audio Definitions */
    #define DATA_FREQ 8000                 /* Audio Data Frequency */
    #define P_S       8                    /* Packet Size */
    #if USB_DMA
    #define P_C       4                     /* Packet Count */
    #else
    #define P_C       1                     /* Packet Count */
    #endif
    #define B_S       (8*P_C*P_S)           /* Buffer Size */
    

    Does this seem right to you? do I need to power on the timer

    LPC_SC->PCONP |= 1 << 2;     // Power on Timer'
    LPC_TIM1->TCR = 1;           // TC1 Enable
    
     current_timer_count = LPC_TIM1->TCR;<<<<<----- is that the correct way to write it you use  T1TC
    

  • TCR (Timer Control Register) is wrong. It's TC (Timer Counter).

    current_timer_count = LPC_TIM1->TCR  //<-- LPC_TIM1->TC
    

    What do you mean "packet loss"?
    How do you detect it?
    If you hear distorted sound on 8k sample change, additional Async modification doesn't improve it.

    Tsuneo

  • Lost code:(

    I start a fresh, but still not luck

    
    Connection Status Device connected
    Current Configuration 1
    Speed Full
    Device Address 1
    Number Of Open Pipes 0
    
    Device Descriptor NXP LPC17xx Speaker
    Offset Field Size Value Description
    0 bLength 1 12h
    1 bDescriptorType 1 01h Device
    2 bcdUSB 2 0200h USB Spec 2.0
    4 bDeviceClass 1 00h Class info in Ifc Descriptors
    5 bDeviceSubClass 1 00h
    6 bDeviceProtocol 1 00h
    7 bMaxPacketSize0 1 40h 64 bytes
    8 idVendor 2 1FC9h
    10 idProduct 2 4002h
    12 bcdDevice 2 0100h 1.00
    14 iManufacturer 1 01h "NXP Semicond "
    15 iProduct 1 02h "NXP LPC17xx Speaker "
    16 iSerialNumber 1 03h "DEMO00000000"
    17 bNumConfigurations 1 01h
    
    Configuration Descriptor 1 Bus Powered, 100 mA
    Offset Field Size Value Description
    0 bLength 1 09h
    1 bDescriptorType 1 02h Configuration
    2 wTotalLength 2 0076h
    4 bNumInterfaces 1 02h
    5 bConfigurationValue 1 01h
    6 iConfiguration 1 00h
    7 bmAttributes 1 80h Bus Powered
     4..0: Reserved  ...00000
     5: Remote Wakeup  ..0.....  No
     6: Self Powered  .0......  No, Bus Powered
     7: Reserved (set to one)
    (bus-powered for 1.0)  1.......
    8 bMaxPower 1 32h 100 mA
    
    Interface Descriptor 0/0 Audio, 0 Endpoints
    Offset Field Size Value Description
    0 bLength 1 09h
    1 bDescriptorType 1 04h Interface
    2 bInterfaceNumber 1 00h
    3 bAlternateSetting 1 00h
    4 bNumEndpoints 1 00h
    5 bInterfaceClass 1 01h Audio
    6 bInterfaceSubClass 1 01h Audio Control
    7 bInterfaceProtocol 1 00h
    8 iInterface 1 00h
    
    Audio Control Interface Header Descriptor
    Offset Field Size Value Description
    0 bLength 1 09h
    1 bDescriptorType 1 24h Audio Control Interface Header
    2  7 01 00 01 27 00 01 01
    
    Audio Control Input Terminal Descriptor
    Offset Field Size Value Description
    0 bLength 1 0Ch
    1 bDescriptorType 1 24h Audio Control Input Terminal
    2  10 02 01 01 01 00 01 00 00
    00 00
    
    Audio Control Feature Unit Descriptor
    Offset Field Size Value Description
    0 bLength 1 09h
    1 bDescriptorType 1 24h Audio Control Feature Unit
    2  7 06 02 01 01 03 00 00
    
    Audio Control Output Terminal Descriptor
    Offset Field Size Value Description
    0 bLength 1 09h
    1 bDescriptorType 1 24h Audio Control Output Terminal
    2  7 03 03 01 03 00 02 00
    
    Interface Descriptor 1/0 Audio, 0 Endpoints
    Offset Field Size Value Description
    0 bLength 1 09h
    1 bDescriptorType 1 04h Interface
    2 bInterfaceNumber 1 01h
    3 bAlternateSetting 1 00h
    4 bNumEndpoints 1 00h
    5 bInterfaceClass 1 01h Audio
    6 bInterfaceSubClass 1 02h Audio Streaming
    7 bInterfaceProtocol 1 00h
    8 iInterface 1 00h
    
    Interface Descriptor 1/1 Audio, 2 Endpoints
    Offset Field Size Value Description
    0 bLength 1 09h
    1 bDescriptorType 1 04h Interface
    2 bInterfaceNumber 1 01h
    3 bAlternateSetting 1 01h
    4 bNumEndpoints 1 02h
    5 bInterfaceClass 1 01h Audio
    6 bInterfaceSubClass 1 02h Audio Streaming
    7 bInterfaceProtocol 1 00h
    8 iInterface 1 00h
    
    Audio Streaming Interface Descriptor
    Offset Field Size Value Description
    0 bLength 1 07h
    1 bDescriptorType 1 24h Audio Streaming Interface
    2  5 01 01 01 01 00
    
    Audio Streaming Format Type Descriptor
    Offset Field Size Value Description
    0 bLength 1 0Bh
    1 bDescriptorType 1 24h Audio Streaming Format Type
    2  9 02 01 01 02 10 01 00 7D
    00
    
    Endpoint Descriptor 03 3 Out, Isochronous, 1 ms
    Offset Field Size Value Description
    0 bLength 1 09h
    1 bDescriptorType 1 05h Endpoint
    2 bEndpointAddress 1 03h 3 Out
    3 bmAttributes 1 05h Isochronous, Asynchronous, Data
     1..0: Transfer Type  ......01  Isochronous
     3..2: Sync Type  ....01..  Asynchronous
     5..4: Usage Type  ..00....  Data
     7..6: Reserved  00......
    4 wMaxPacketSize 2 0042h 66 bytes
    6 bInterval 1 01h 1 ms
    7 bRefresh 1 00h
    8 bSynchAddress 1 83h
    
    Audio Streaming Isochronous Audio Data Endpoint Descriptor
    Offset Field Size Value Description
    0 bLength 1 07h
    1 bDescriptorType 1 25h Audio Streaming Isochronous Audio Data Endpoint
    2  5 01 00 02 00 00
    
    Endpoint Descriptor 83 3 In, Isochronous, 1 ms
    Offset Field Size Value Description
    0 bLength 1 09h
    1 bDescriptorType 1 05h Endpoint
    2 bEndpointAddress 1 83h 3 In
    3 bmAttributes 1 01h Isochronous, No Sync, Data
     1..0: Transfer Type  ......01  Isochronous
     3..2: Sync Type  ....00..  No Sync
     5..4: Usage Type  ..00....  Data
     7..6: Reserved  00......
    4 wMaxPacketSize 2 0003h 3 bytes
    6 bInterval 1 01h 1 ms
    7 bRefresh 1 01h
    8 bSynchAddress 1 00h