Hi everyone,
I have posted to this forum a couple months ago about using the enable_irq()/disable_irq() instruction intrinsics in RealView Compiler (ARMCC V4.0.0.728). In that occasion, I set up two software interrupts for calling such intrinsics, as they only have the intended effect when not in User Mode.
Just now, though, I realized that interrupts were not being disabled. I know for a fact that my SWI are set up appropriately, because they change the value of a flag I set up. Does anyone have any clue what could be happening? Documentation seems to be pretty clear about the fact that one enters supervisor mode during SWI, and that would be appropriate for enabling/disabling interrupts, but I must be missing something.
Relevant source code
void __SWI_8 (void) { __enable_irq(); __enable_fiq(); interrupts_enabled = 1; } void __SWI_9 (void) { __disable_irq(); __disable_fiq(); interrupts_enabled = 0; }
Relevant links
Instruction Intrinsics http://www.keil.com/support/man/docs/armcc/armcc_chdfgfab.htm
disable_irq() www.keil.com/.../armccref_CJAFBCBB.htm
enable_irq() www.keil.com/.../armccref_CJAEAEHA.htm
ARMCC: MODIFY IRQ FLAG TO ENABLE/DISABLE INTERRUPTS (RealView Compiler V3) http://www.keil.com/support/docs/3229.htm
Thanks in advance, -- George Andrew Brindeiro Robotron Automation and Technology
too long since i did this.
when you go into the swi, the processor switches to another dedicated CPSR. you changing irq and fiq change the CPSR of the swi.
when you leave swi the original cpsr gets restored. you disabling irq and fiq are only good in side the swi.
can be bad detail but consept is right.
always yo're freind.
Zeusti
ARM programmer and chef management engineer and desine consultant (retyred)
i never said Please read the manual but u can look at the hitex insiders guides. they r good.
www.hitex.co.uk/index.php
also look for the abi. real ARM experts know it.
Always yo're freind.
Zeusti.
zeusti@supercomputersforyouandyoremum.com
Zeusti,
Thanks for the reply, you have a good point.
I have read the hitex manuals, and was aware of the dedicated CPSR, but I guess I thought the intrinsics would change the CPSR in User Mode through the SPSR in Supervisor Mode.
I'll check if I can make it work by writing some inline assembly, and get back to this topic.
-- George Andrew Brindeiro Robotron Automation and Technology