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A strange situation where an internal watchdog reset implementation seems not to work on the 87c520 target while it does work ok when using the Ceibo ICE. Seems like the reset occurs but unclear where the PC jumps to because the SW does not restart properly but rather stays "stuck" (we know it enters the if (status) passage). With the ICE the program does start ok. What we do is enable the watchdog timer in the program. In the interrupt handler (ISR 12) depending on some status, we enable the reset itself. All this occurs, but then for the target the program does not go into running normally. Any ideas? Thanks, Baruch if ( status ) // { TA = 0xAA ; //Accessing timed access in order to start the watchdog timer TA = 0x55 ; // EWT = 1 ; // Enable WatchDog timer reset TA = 0xAA; //Accessing timed access in order to start the watchdog timer TA = 0x55; // WDIF = 0 ; // watch dog flag clear } else { TA = 0xAA; //Accessing timed access in order to start the watchdog timer TA = 0x55; // WDIF = 0 ; // watch dog flag clear TA = 0xAA ; //Accessing timed access in order to start the watchdog timer TA = 0x55 ; // RWT = 1 ; // Restart Watchdog timer }
Of course. The normal resolution would be to handle the POR and/or the WTRF (WDCON.2) for the watchdog reset flag at the beginning of the EPROM code. For various practical reasons we would have liked to avoid modifying the EPROM code, but it seems that we will have to take this course. Thanks again, Baruch