Hello Has anybody tried to get it work on the 42800 cpu? i experience problems in adapting the artxconfig.c I wanted to use the cpu's PIT to generate the os_clock_interrupt, but didn't get it work. So i wrote a simple programm to test the PIT and got it work. the source:
void os_clock_interrupt_2 (void) __irq { PIOB_SODR = LED_MASK; if(bActiveLed == 0x80) bActiveLed = 1; bActiveLed <<= 1; (ST_SR & 0x00000001); //without this it won't work, but i don't know why?! AIC_EOICR = 0xffff; //signal end of ISR } void main (void) { PIOB_PER = LED_MASK; PIOB_OER = LED_MASK; PIOB_SODR = LED_MASK; //PIT INIT ST_PIMR = 0x00007500;//Set PIT Reload Value (SCK Cycles) ST_IMR = 1; //Enable PIT_IRQ ST_IER = 1; //AIC Init AIC_SPU = (DWORD)os_def_interrupt_2; AIC_SVR12 = (DWORD)os_clock_interrupt_2; AIC_SMR12 = AIC_SRCTYPE_INT_EDGE_TRIGGERED | 0; AIC_IECR = (1<<12); //Generate 1st IRQ to test AIC_ISCR = (1<<12); while(1) { PIOB_CODR = (dword)(bActiveLed<<8); } }
#define OS_TIM (1 << 12) // Interrupt Mask #define OS_TRV ((DWORD)(((double)OS_CLOCK*(double)OS_TICK)/1E6)-1) //Reload Value in Clock Cycles #define OS_TVAL (0) // Timer Value --> n/a #define OS_TOVF (ST_SR && 0x00000001) // Overflow Flag #define OS_TREL() 0;// Timer Reload --> n/a #define OS_TSOVF() AIC_ISCR = OS_TIM; // Set Overflow //Interrupt Ack #define OS_TIACK() (ST_SR & 0x00000001); //System Timer Init #define OS_TINIT() ST_PIMR = OS_TRV;ST_IMR = 1;ST_IER = 1; AIC_SPU = (DWORD)os_def_interrupt; AIC_SVR12 = (DWORD)os_clock_interrupt; AIC_SMR12 = AIC_SRCTYPE_INT_EDGE_TRIGGERED | 0; AIC_IECR = OS_TIM; AIC_ISCR = OS_TIM; #define OS_LOCK() AIC_IECR = 0; #define OS_UNLOCK() AIC_IECR = OS_TIM;
There is a ARTX configuration for the Atmel AT91SAM7S parts in the folder: \Keil\ARM\Boards\Atmel\AT91SAM7S\ARTX_Blinky which may help you to make the relevant adaptation. I guess there is a missing source line in the OS_TIACK macro. It should look like below:
// Interrupt Ack #define OS_TIACK() (ST_SR & 0x00000001) AIC_EOICR = 0xffff; //signal end of ISR