Why I can access the xdata memory 0x38000 to 0x3FFFF but can't access 0x28000 to 0x2FFFF?

Hi Andrew, thanks for your attention.

The processor W77C32 hasn't any code memory, and has 256 bytes on-chip RAM. I extanded the ROM via 29EE010 and RAM via 62LV1024. I separate both of ROM and RAM into four banks(32K x 4), and use the same address to select the bank. Bit 0 and bit 1 of the port P0 indicate the bank which is selecting. These bits are latched in a 74HC573.

The options of my target is following:

Device page:
use w77x32, select LX51 and AX51

Target page:
Memory Modle select "Large...",
Code Rom Size select "Large...",
Operating select "none",
Select code banking,
banks is 4,
Bank Area:0x8000 to 0xffff,
In the group of "off-chip Xdata Memory", first line:
Start:0x0000 Size:0xffff,
Enable 'far' memory type support,
The rest is blank.

LX51 Locate page:
select "Use Memory Layout from Target Dialog",
Type the code following into "User classes":

XDATA (X:0x0-X:0x7FFF),
CODE (C:0x0-C:0x7FFF),
HDATA ( X:0x028000-X:0x02FFFF,
X:0x038000-X:0x03FFFF,
X:0x048000-X:0x04FFFF,
X:0x058000-X:0x05FFFF,
X:0x068000-X:0x06FFFF,
X:0x078000-X:0x07FFFF,
X:0x088000-X:0x08FFFF) ,
HCONST (B1:0x8000-B1:0xFFFF,
B2:0x18000-B2:0x1FFFF,
B3:0x28000-B3:0x2FFFF,
B4:0x38000-B4:0x3FFFF,
B5:0x48000-B5:0x4FFFF,
B6:0x58000-B6:0x5FFFF,
B7:0x68000-B7:0x6FFFF)

;*******Configuration Section *************
?B_NBANKS  EQU  4
           ; Define maximum Number of Banks
?B_MODE    EQU  1
           ; 1 for Bank-Switching via XDATA Port
?B_RTX     EQU  0
           ; 1 for applications using the RTX-51 real-time OS
?B_VAR_BANKING  EQU  1
           ; 1 Variable Banking uses this L51_BANK.A51 module
?B_RST_BANK     EQU  0xFF
           ; --------------------*

In my source code, I define two arrays of structure at different C source file. When I debugging, I can see one array's address is start at 0x28000, and an other at 0x38000. Then I program the Hex file into 29EE010, and run it at the circuit. If the processor do not access the xdata address from 0x28000 to 0x2ffff, it works fine. But when it access these address, the processor reseting, running start at the main function! It dosn't appear any problem when the processor access the address from 0x38000 to 0x3ffff.

Is my configuration incorrect?
Why it can access from 0x38000 to 0x3ffff but can't access from ox28000 to 0x2ffff?
Any body can help me?
Thanks.

Hi Andrew, thanks for your attention.

The processor W77C32 hasn't any code memory, and has 256 bytes on-chip RAM. I extanded the ROM via 29EE010 and RAM via 62LV1024. I separate both of ROM and RAM into four banks(32K x 4), and use the same address to select the bank. Bit 0 and bit 1 of the port P0 indicate the bank which is selecting. These bits are latched in a 74HC573.

The options of my target is following:

Device page:
use w77x32, select LX51 and AX51

Target page:
Memory Modle select "Large...",
Code Rom Size select "Large...",
Operating select "none",
Select code banking,
banks is 4,
Bank Area:0x8000 to 0xffff,
In the group of "off-chip Xdata Memory", first line:
Start:0x0000 Size:0xffff,
Enable 'far' memory type support,
The rest is blank.

LX51 Locate page:
select "Use Memory Layout from Target Dialog",
Type the code following into "User classes":

XDATA (X:0x0-X:0x7FFF),
CODE (C:0x0-C:0x7FFF),
HDATA ( X:0x028000-X:0x02FFFF,
X:0x038000-X:0x03FFFF,
X:0x048000-X:0x04FFFF,
X:0x058000-X:0x05FFFF,
X:0x068000-X:0x06FFFF,
X:0x078000-X:0x07FFFF,
X:0x088000-X:0x08FFFF) ,
HCONST (B1:0x8000-B1:0xFFFF,
B2:0x18000-B2:0x1FFFF,
B3:0x28000-B3:0x2FFFF,
B4:0x38000-B4:0x3FFFF,
B5:0x48000-B5:0x4FFFF,
B6:0x58000-B6:0x5FFFF,
B7:0x68000-B7:0x6FFFF)

;*******Configuration Section *************
?B_NBANKS  EQU  4
           ; Define maximum Number of Banks
?B_MODE    EQU  1
           ; 1 for Bank-Switching via XDATA Port
?B_RTX     EQU  0
           ; 1 for applications using the RTX-51 real-time OS
?B_VAR_BANKING  EQU  1
           ; 1 Variable Banking uses this L51_BANK.A51 module
?B_RST_BANK     EQU  0xFF
           ; --------------------*

In my source code, I define two arrays of structure at different C source file. When I debugging, I can see one array's address is start at 0x28000, and an other at 0x38000. Then I program the Hex file into 29EE010, and run it at the circuit. If the processor do not access the xdata address from 0x28000 to 0x2ffff, it works fine. But when it access these address, the processor reseting, running start at the main function! It dosn't appear any problem when the processor access the address from 0x38000 to 0x3ffff.

Is my configuration incorrect?
Why it can access from 0x38000 to 0x3ffff but can't access from ox28000 to 0x2ffff?
Any body can help me?
Thanks.