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TImer Interrupt

Ivan Cheung

I have a timer interrupt problem. When i use timer 1 & external interrupt together, i disable All interrupt and enable it again when leaving the function. If there is external interrupt, it may miss the the timer intrrupt. Am i true???

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  • 0 in reply to Oleg Sergeev

    Hi Ivan,

    If you want the timer 1 and an external interrupt 0? to work even when in another ISR then you need to set the priority bit for timer 1 (PT1) and eternal interrupt 0 (PX0) as described in the Interrupt Priority (IP) Register.

    Please note that when the '51 is in an interrupt you dont need to clear EA as interrupts of the same priority cannot be interrupted by any other interrupt source with the same priority.

    Also, if you require either the timer 1 or external interrupt to be able to interrupt each others ISR's then this is a little bit harder - but not impossible to acheive.

    Mark.

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  • 0 in reply to Oleg Sergeev

    Hi Ivan,

    If you want the timer 1 and an external interrupt 0? to work even when in another ISR then you need to set the priority bit for timer 1 (PT1) and eternal interrupt 0 (PX0) as described in the Interrupt Priority (IP) Register.

    Please note that when the '51 is in an interrupt you dont need to clear EA as interrupts of the same priority cannot be interrupted by any other interrupt source with the same priority.

    Also, if you require either the timer 1 or external interrupt to be able to interrupt each others ISR's then this is a little bit harder - but not impossible to acheive.

    Mark.

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