Hello
I Always used Atmel AT89C51RE2 but there the production stopped we changed over to Silicon C8051F580 processor.
now I am facing problems with the memory. when I add variables after downloading the program wont run. the compiler give Program Size: data=78.3 xdata=172 code=10749
so to mine point there is enough space. maybe something with parameters?
with regards
Jos
you are missing the watchdog disable in startup
this is mine memory model
//memory model for Titan //version: //date 02 march 2018 #include "defines.h" #include "memory.h" signed char iPos = -1; //pointer received data signed char xdata channel=0; signed char xdata Address; signed char xdata iMessLen=0; unsigned char idata hexstring[8]; unsigned char xdata Uart_Buffer_Pointer = 0; //unsigned char xdata Uart[Uart_Buffer_In_Size]; unsigned char xdata rMessage[Uart_Buffer_In_Size]; // data for processcom unsigned char xdata sMessage[Uart_Buffer_Out_Size]; // data for Sendbuffer unsigned char xdata LMessage[Uart_Log_Output]; unsigned char idata Uart_Tx_Index; unsigned char idata Uart_Tx_SendLen; unsigned char idata mem[0x10]; unsigned char idata CalData[0x10]; unsigned char idata ScheduledKanalen=0x00; // Mask of kanalen used in scheduling unsigned char idata MeasuredKanalen=0x00; // Mask of kanalen measured since last readout signed int xdata Kanalen[NUMANAIN] = {-32768,-32768,-32768,-32768}; unsigned char xdata Dig[2]; // Control for digital in and out unsigned char LRCResult(); unsigned char xdata ucLRC; //clock //signed int date=0; long idata seconds=0; long idata longvalue=0; //datalogging bit memory_overwrite_flag = 0; bit memory_overflow_flag = 0; bit setlogging_flag =0; bit forced_logging_flag =0; bit setmask_flag = 0; //uart bit uart_rx_valid=0; //data received valid bit uart_tx_flag=0; //data transmitted valid bit ti_1_busy; bit rx_valid; bit sendserialnumber; bit TX_Ready =0; struct TimeProfile idata Tprofile; struct LogProfile idata Lprofile;
this is the start of mine program
SFRPAGE = ACTIVE_PAGE; PCA0MD &= ~0x40; // Disable watchdog timer PORT_Init(); // Initialize Port I/O SYSCLK_Init (); // Initialize Oscillator TIMER0_Init (); // Initialize Timer0 TIMER2_Init (); // Initialize Timer2 SPI0_Init (); UART0_Init (); // Initialize UART LED_1 = OFF; LED_2 = OFF; LED_3 = OFF; //SFRPAGE = ACTIVE2_PAGE; //disabling this line will activate wd but out of control EA = 1; RX_EN = OFF; TX_EN = OFF; readcaldata(); ADC_Init(); Watchdog_Init (); if ((RSTSRC & 0x02) == 0x00) // First check the PORSF bit. if PORSF { // is set, all other RSTSRC flags are // invalid // Check if the last reset was due to the Watch Dog Timer if (RSTSRC == 0x08) { EA = 1; // Enable global interrupts } } // Calculate Watchdog Timer Timeout // Offset calculated in PCA clocks // Offset = ( 256 x PCA0CPL5 ) + 256 - PCA0L // = ( 256 x 255(0xFF)) + 256 - 0 // Time = Offset * (12/SYSCLK) // = 255 ms ( PCA uses SYSCLK/12 as its clock source) PCA0MD &= ~0x40; // Disable watchdog timer PCA0L = 0x00; // Set lower byte of PCA counter to 0 PCA0H = 0x00; // Set higher byte of PCA counter to 0 PCA0CPL5 = 0xFF; // Write offset for the WDT PCA0MD |= 0x40; // Enable the WDT watchdog still not working well EA = 1; // Enable global interrupts </prev> Also I use the standard startupfile from Keil/Silicon
who cares about your memory model, your problem is not disabling the WD in startup
and it's incomplete, anyhow; eg, where are the array size definitions?
Not sure that this would generally be called a "memory model" - it's just a list of (presumably global?) variables.
www.silabs.com/.../mcu_constantly_reset-2DbM
thanks Erik
I will try Jos
Note that this was the very first reply given to your cross-post on the SiLabs forum:
www.silabs.com/.../hello_i_am_jos-5BRm
Thus showing the importance of keeping up-to-date with all the threads if you're going to cross-post the same questions to multiple places!
Be sure to go back and thank 'delu' on the SiLabs forum ...