How to address the ports of the Teridian 71M6541FT processor, when developing software in the µVision program on C?
Ports list: SEGDIO0 – SEGDIO14 SEGDIO19 – SEGDIO27 SEGDIO36 – SEGDIO39 SEGDIO44 SEGDIO45 SEGDIO51 COM0 – COM3 SEG46 SEG47 PB VLCD VREF IAP IAN V3P3A VA TEST GNDA XOUT XIN VBAT_RTC VBAT V3P3SYS IBP IBN GNDD V3P3D VDD ICE_E SEG48 – SEG50 RX TX
Unfortunately, I'm not familiar with the Teridian 71M6541FT processor. Ports are usually controlled and configured with SFRs or sometimes with memory mapped registers in the XDATA space. Since I don't have any information about this device, I cannot help you with a concrete header file. I only found a datasheet for a 71M6543 device which should be similar. On page 34 and table 14 you can see how the pins SEGDIO0 – SEGDIO15 are mapped to the P0, P1, P2 and P3 SFRs and their addresses. You should have a similar table for your device and its pins as well. The previous link already shows you how to define SFRs. You can also take a similar header file and adapt it to your device.