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Hey guys , I have ran my application on the LPC4357 dual-core MCU and both cores r running successfully . Its a multi-project application and I can easily debug the Cortex-M4 core application . Now I want to switch the active project to the Cortex-M0 application and debug the M0 code . The M0 executes from the internal SRAM . Any Ideas?
U r right man , I had the following ini file LOAD "D:\\LPC4357 tests\\M0 Object\\Cortex_M0_Slave.hex" PC = *((unsigned int *)0x2000C000); SP = *((unsigned int *)0x10000200); // It can load the PC with the correct base address , but it seems like the Cortex-M0 is not released from reset because the M4 is kept at reset . any idea?
The SP/PC load looks a little odd, doesn't it use a vector table? Where is that mapped?
You can program whatever registers you need to walk it through the initialization, or configuration is required. Look at what you M4 setup/startup code does.
See if there are any forum dealing with the NXP parts, and look at what GNU/GDB debugger script do so you might replicate or adapt those to Keil syntax.